10-31-2014 03:33 AM
Hi,
I am using sbRIO 9641. I would like to sample a AI voltage signal at the rate of 1000 samples/sec. (i.e 1000Hz). As of now I am reading all the 1000 samples, but how do you set the number of samples to read? If I'm reading 1000 samples, my loop time would be 1 sec right? That is, I would get 1000 samples every second.
If I want 1 sample per second (that is, I would like to average the 1000 samples to 1). How do I do the averaging (filtering)?
Should I use invoke method and read from DMA?
10-31-2014 04:10 AM
How are you reading the signal? Are you using your own FPGA bit file or are you using the Scan Engine?
If using the FPGA, I would do the averaging inside of the FPGA and then pass that value up to your RT when it is available.
10-31-2014 04:42 AM - edited 10-31-2014 05:05 AM
I use FPGA VI (fpga bit file). Do you mean I should do the averaging on the fpga VI?
10-31-2014 05:18 AM
If you have the space in the FPGA, I would. Use a FOR loop to take 1000 samples. In the FOR loop, take the reading, convert it to a SGL and then add it to the running sum (keep the running sum in a shift register). After the loop is done, divide by the 1000 and report that value to your RT.
10-31-2014 06:43 AM
The output changes to an unsupported type.
Here is the VI.
Is this what you meant? Correct me if wrong.
10-31-2014 03:10 PM
Sorry, LabVIEW 2011 didn't allow the SGL in the FPGA. I said to convert to a SGL in order to avoid the overflow issues with the fixed point. So use a DMA FIFO to pass the values up to the RT and let the RT do the averaging.
11-01-2014 12:26 AM
Hi crossrulz,
I get NaN when I run it, why is it so? Am I doing it the right way?
Help!
Here are the VIs.
11-02-2014 01:24 PM
You are reading a sample in the FPGA every 1ms. But then you are asking for 1000 samples with a timeout of 100ms. That will not work and you should be getting timeout errors, and possibly no data with your read.
A much more efficient way to read you data from the DMA FIFO is to read 0 elements with a timeout of 0. From that you get the number of elements that are in the FIFO. If the number of elements is greater than your 1000, then read the 1000, otherwise wait something like 50ms.
11-03-2014 12:24 AM - edited 11-03-2014 12:39 AM
If I insert a for loop in the fpga vi with N=1000, then does that mean I am writing 1000 samples per 1ms? and then at the RT vi, can I average them to 1 sample?
Here is the vi.
How do I make the rt vi to read 1000 samples per second? (that is, the loop time should be 1 sec) Should I use a loop timer at the rt vi too?
If I'm reading 1000 elements on the rt vi, then should'nt the loop time be 1 sec?
11-03-2014 02:15 AM
Hi crossrulz,
The data out shows single digits (that is, without the decimal places). Why is it so? How do I make it to show exactly what it is acquiring? What changes do I have to make? I am not able to change the data out to a different data type.
Here is the vi.