sampling using sbRIO

[GerdW]

Hi kdm,

a RT/FPGA vi without the project is nearly senseless:

But what I can say from looking at your VI: an I16 indicator will NEVER show any decimal digits!

Let your FPGA FIFO transport the datatype you use in the FPGA (FXP I guess) and convert that to SGL/DBL in the RT host!

That has been suggested before, so why don't you do this?

When your FPGA VI uses just I16 values then why do you expect any decimal digits in your values?

[kdm7]

Hi Gerd,

Here I've tried "convert to dbl", but it wont give the decimal places. I think I have to make the data out itself appear as dbl. 

It is not possible to convert at the fpga vi too. 

How do I convert?

Here is the project.

[kdm7]

Got it !