DO with fifo usage niDAQmx 6231 using C#

[Kelly64]

Hello

I'm new to the DAQmx series and to c#.  My configuration:  Win10, a PCIe 6321 card and NI DAQ 19.6 for my .NET infrastructure.  I'm using VS2017, and I don't have NIView or NI Developer.

I'm looking for an example snip of code that writes a buffer of data to port 0 (digital output) of the 6321 card using DMA.  I've looked in the examples and online but I have not seen anything close to what I'm seeking.  It appears to me that FIFO usage is a very very specific topic and is not covered by any generalized examples.  Is there anything for DMA control for DO operations?

Also: 

From the 631 spec sheet:

Port/sample size	Up to 8 bits
Waveform generation (DO) FIFO	2,047 samples

How is the memory in the 6321 ordered?  If I write 8 bits of data (from a 2047 sample memory space), does that mean that my buffer length for the entire space is 2047/8 =  255 outputs?  What's the correlation between the sample space and aggregate channel lines?

Thx for any inputs. 

[Kevin_Price]

This isn't a comprehensive answer, but hopefully it helps nudge you along some.  I only program in LabVIEW so I'm no help for text language examples.

- Generally speaking, DAQmx will handle the DMA stuff automatically.

- I'm pretty sure the 2047 "samples" will each have the same bit width as port0.  But it isn't going to do any special bit-packing.  If your task only uses 1 bit, the FIFO will still only hold 2047 samples of that 1 bit.

- There are some advanced DAQmx property settings that give you partial control over FIFO usage, mainly to provide a means to decrease *latency* between writing new data to the task buffer (on the PC) and generating the physical signal at the output pin.

   You get 3 choices for when the DMA controller should pull data from the task buffer down to the device.  When the FIFO is "less than full", "half full", or "essentially empty".    The default is "less than full", leading to max latency and lowest risk of FIFO underflow.

-Kevin P