On an NI-6363 : How many digital samples can be acquired at one go?

[ravikanthsomsolencsu]

Hello,

I'm using a NI-6363 with counter 3 configured for finite pulse generation.

I've created a digital input channel to acquire digital values(on P0.16 and P0.17) with counter3 as the sample clock.

The idea is to achieve acquiring a finite number of digital samples (same as the number of finite pulses generated on counter3).

I am currently trying to understand if I can acquire about 1000 samples (requirement of my application).

The datasheet says the FIFO size for digital input is 255. Does this mean I cannot acquire more than 255 samples at a time?

I tried using large values upto 1000 but no error occurs.

Does this mean the read out values will be correct?

Or im guessing it might be a circular FIFO which gives out the same values upon reading more than 255 values.

Do I need to worry about this 255 limit at all??

Thanks

[EricEvola · Accepted solution]

Since no one has answered this yet and I posted my own question moments ago, I'll take a stab at helping out.

The FIFO on the digital input is the onboard location where samples will be stored untill they are transfered over the bus into RAM. So the question becomes what controls when these samples are pushed to RAM. If I remember correctly, this card has 8 DMA channels 1 of which will control when these samples are transfered across the buss. I don't think there's any way to control when the DMA channel completes its transfer, but the first transfer is likely before you are filling up the first 255 samples. DMA transfers will continue to happen untill all samples have been transfered to PC RAM.

Once some or all of the samples have been transfered across the buss and reside on PC RAM, you call then call DAQmx read. Then the samples are in your Application Development Environment (ADE) RAM so you use them in your program.You have 3 distinct storage locations: Onboard FIFO, PC Memory, ADE Memory.

You shouldn't have to worry about the 255 limit. Maybe if you were doing very fast acquisition this might be a factor...

Regards,
Eric

[ravikanthsomsolencsu]

Hi Eric,

Thanks for that very concise and helpful answer! It makes sense to me now.

The frequency is about 100kHz now. I suppose this is slow enough for acquisition of a large number of samples.

Regards,

Ravi

[EricEvola]

Hi Ravi,

No problemo! My last comment about the very fast sample rates is only a guess, but I think it seems logical. I have never really considered the FIFO size of the onboard buffer under normal DMA scheduled acquisitions because the maximum sample rate for the card and the FIFO size should have been chosen by the card designers to work well together without generating overflows.

Would you mind marking the reply as a solution? Happy DAQing,

Eric