I have a problem of setting PCI-6251 analog output sample clock rate. I tried many setting of sample rate, from 10 kHz to 1 MHz. If the sample rate is less than 33 kHz, the output signal (1 kHz square wave) measured by oscilloscope is OK. If the sample rate is larger than 33 kHz, there is a problem. The output signal becomes DC 5 V. I check the max. sample rate in PCI-6251 specification note. The max. sample rate (updating rate) is 2.86 MHz. The target of my application is that the time step between each sample must be less than 50 us. I tried to find some information om internet, but I cannot find anything about this. The sample clock which I used is on board clock. If someone have some suggstion, please answer this post. Thank you.
