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Using counter 0 out as clock for counter 1 with nidaqmx python

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I have a PXI6733 board, and I'm trying to setup the output of counter 0 as the clock for counter 1 with the following code in nidaqmx python. Sorry about the fact that indentation is not preserved in cut and paste here.
 
import time
import nidaqmx
import numpy as np
from nidaqmx.constants import AcquisitionType
from nidaqmx.stream_readers import CounterReader

num_samples = 2
with nidaqmx.Task() as clk_task, nidaqmx.Task() as ctr_task:
clk_task.co_channels.add_co_pulse_chan_freq("/PXI1Slot8/ctr0", freq=1000.0,
duty_cycle=0.5)

print("Ctr 0 output term is",clk_task.export_signals.ctr_out_event_output_term)
ctr_task.ci_channels.add_ci_count_edges_chan("/PXI1Slot8/ctr1")
# set up clock
clk_task.timing.cfg_implicit_timing(samps_per_chan=int(1000))
ctr_task.timing.cfg_samp_clk_timing(1000.0, source="/PXI1Slot8/Ctr0Out",
samps_per_chan=num_samples)
ctr_task.start()
data = np.zeros(num_samples) - 10
reader = CounterReader(ctr_task.in_stream)
clk_task.start()
while not clk_task.is_task_done():
time.sleep(0.1)
# samples_read = reader.read_many_sample_double(data,
# number_of_samples_per_channel=num_samples)
clk_task.stop()
ctr_task.stop()
print(samples_read)
 
Even with the reading part commented out, I get the error,
 
nidaqmx.errors.DaqError: The specified resource is reserved. The operation could not be completed as specified.
 
I have checked that i am able to get the counter 0 output as a clock waveform on a scope with nidaqmx-python, and also that I'm able to read from counter 1 input using nidaqmx-python. But somehow it won't let me  use them together. I think this used to work previously when I  wrote wrappers around the dlls with ctypes.
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You're using a pretty old device that has some limitations.  Specifically, finite pulse trains will occupy *both* counters -- one is used to "gate" the other so that it only outputs the requested # of pulses.

 

A continuous pulse train would only occupy one counter and you could then use the other counter for edge counting.  But I don't know your overall app to know whether switching to continuous pulses would be a viable solution.

 

 

-Kevin P

ALERT! LabVIEW's subscription-only policy came to an end (finally!). Unfortunately, pricing favors the captured and committed over new adopters -- so tread carefully.
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Thank you Kevin! I realized it must be a problem with the device, but didn't understand why. I ended up using another M-series board with ctr0 output tied to the PFI0 on this board, and the code works perfectly. Your explanation helps to understand why it wasn't working earlier. Do the newer M-series board not have this limitation ? How does one find that out without getting it and testing it the way I did?  

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Accepted by topic author silicontype

M-series may be newer but are still fairly old, introduced nearly 20 years ago, and still with this same limitation.

 

An X-series board would be a *much* better option.  Not only is this restriction removed, but you you get 4 counters instead of 2 as well!

 

Note however that there are sometimes "sneaky" ways to make older hardware accomplish your end goal. Instead of trying to make the clock counter generate a finite pulse train, you can let it generate continuously.  Then you can configure only the edge-counting counter as a finite task.  You'll still only capture the specified finite # of count values -- the edge-counting task will just stop paying attention to the continuous clock once it fills its buffer.

    This is a method that should work with just the 2 counters on your 6733 without needing to occupy another device.

 

 

-Kevin P

ALERT! LabVIEW's subscription-only policy came to an end (finally!). Unfortunately, pricing favors the captured and committed over new adopters -- so tread carefully.
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