08-30-2021 11:22 AM
Hello,
I have a PCIe-6321 were I simultaneously capture 3 analog channels and 1 encoder on the same card. To these signals still an acceleration measurement with a 9250 card in a cDaq-9181. All 5 channels should be sampled as synchronously as possible. The sampling rate of the analog channels is 5kHz the sampling rate of the acceleration is 10kHz.
Question 1: How can I get the analog and the acceleration nearly synchronous?
Question 2: Why does the cDaq delay the whole measurement by about 300ms and how can i reduce this Delay?
Pic1: here i lost 200~300ms
Pic2: TestVi Hardware Rack is cDaq 9174 . here i lost ~150 to 200ms
Thank a lot for your Help
Tha
08-30-2021 01:07 PM
Your hardware selections leave you at a bit of a dead end, with no way to establish or maintain sync.
The single best change you could make would be one of:
- use an accelerometer and/or signal conditioner that can produce a signal appropriate for capture with your 6321 card. Then the accel signal can be added to your existing task there, and Pic1 already appears to sync AI and encoder correctly.
- use a multi-module cDAQ chassis and add a 5V DO (or DIO) module that can be used to export needed timing signals for sync. This will be a good bit more involved from the standpoint of data acq programming and understanding.
Your 9250 is a Delta-Sigma device which cannot accept an external sample clock. You would need the 9250 to be the timing master for your system, and export its sample clock out to a line on a DO module. Then you'd need to physically wire that clock (and probably also the digital ground) over to a PFI pin on your 6321's terminal block. And then you'd need to configure your 6321 tasks to use that PFI terminal as their sample clock. And then you'd still need to compensate your data due to the inevitable filter delay built into Delta-Sigma devices like your 9250.
The single-slot 9181 chassis and 9250 don't seem to offer up any way to export a timing signal such as the sample clock. The only semi-crazy idea I can come up with goes kinda like this:
- add a DO or AO task to your 6321. Configure it to share the AI sample clock, just like you did with the encoder task. But you can let it be a short finite task with only a few samples. Define a single 5V pulse with the data (a few samples of 0, 1 or more samples of 5V, a few more samples of 0). Wire this output over to the 2nd channel of the 9250. Configure the 9250 to be triggered by a rising slope with a threshold of 2.5V.
This will establish a hardware-fixed timing offset between the task start times of the two devices. There are still filter delay issues to deal with. And if the acquisition lasts for an appreciable time, you'll also have an unknown amount of timing skew between the two devices since they are being timed by independent clocks which won't be in exact agreement. Your 6321 is probably spec'ed at around 50 ppm clock accuracy, so timing skew could shift you by 1 sample per 20k.
In short, no *great* options, probably not even any good ones without changing your hardware.
-Kevin P