Errors in 74LS161N and 74LS163D models

[mak22223]

Hello, everybody.

I was working on my university project and used models of 74LS163D in it. When I built the scheme it turned out that my 16-bit counter doesn't work properly.

After long series of trial and errors I came up to a conclusion that the error is not in my design but in the model of the 74LS163D. Input ENT doesn't disable RCO output when low. Models of 74LS161, 162 also have issues, e.g. 161 seems that ENP and ENT are mixed up in places and in 162's model ENP also disables RCO while it shouldn't according to the datasheet. I haven't checked 74LS160.

I've attached a part of 74LS163 datasheet where RCO signal is formed.

[ElizaBalas]

Hello mak22223,

Could you upload the design so we can test it and verify the issue?

Thank you,

Eliza

[mak22223]

Here is the design with 16-bit counter and a "testbench". 16-bit counter is built according to datasheet to avoid mistakes.

 

[ElizaBalas]

Hello mak22223,

The workaround for the issue with RCO (which isn't disabled by ENT signal) is to use an AND gate for the RCO signals that come from the lower 2 counters in cascaded mode.

I attached the modified example.