NI VeriStand FPGA-Based I/O Interface Tools Discussion

[StephenB]

The debug version does not install anything at all. The dialog is wrong. It simply creates a text file on your desktop with debug information. Can you attach that text file to this thread so I can look?

[MoonChen]

For your information I attached the log anyway.

Thank you very much for your time and effort!

yelingxing

...............................................................

2011
C:\Program Files\National Instruments\LabVIEW 2011
C:\Users\chenmuyuan\Desktop\NI VeriStand FPGA Interface Tools 2010+ 1.1.1\NI VeriStand FPGA Interface Tools 2010+\Files\2010
resource
Targets
user.lib
C:\Users\chenmuyuan\Desktop\NI VeriStand FPGA Interface Tools 2010+ 1.1.1\NI VeriStand FPGA Interface Tools 2010+\Files\2010\resource
C:\Users\chenmuyuan\Desktop\NI VeriStand FPGA Interface Tools 2010+ 1.1.1\NI VeriStand FPGA Interface Tools 2010+\Files\2010\Targets
C:\Users\chenmuyuan\Desktop\NI VeriStand FPGA Interface Tools 2010+ 1.1.1\NI VeriStand FPGA Interface Tools 2010+\Files\2010\user.lib
C:\Users\chenmuyuan\Desktop\NI VeriStand FPGA Interface Tools 2010+ 1.1.1\NI VeriStand FPGA Interface Tools 2010+\Files\2011

[Hreidmar]

Hello Stephen,

I want to report a bug about Ni 9217 RTD module Ni Veristand FPGA Library. XML example has bug in 9217 4Ch RTD Input.vi

</Parameters> is missing. Because of that Veristand gets an error.

Best Regards,

[StephenB]

Fixed! Thank you for letting me know

[MaximeD]

Hi Stephen,

I get the same error as Tobias and yelingxing... I am using Labview 2011 SP1 and Windows XP.

I used the NI VeriStand FPGA Interface Tools Installer_DEBUG.vi, and you can find attached the log file I get.

Regards,

Maxime

......................................

2011

C:\Program Files\National Instruments\LabVIEW 2011

D:\Documents and Settings\mderbois-ext\Mes documents\Téléchargements\NI VeriStand FPGA Interface Tools 2010+\Files\2010

resource

Targets

user.lib

D:\Documents and Settings\mderbois-ext\Mes documents\Téléchargements\NI VeriStand FPGA Interface Tools 2010+\Files\2010\resource

D:\Documents and Settings\mderbois-ext\Mes documents\Téléchargements\NI VeriStand FPGA Interface Tools 2010+\Files\2010\Targets

D:\Documents and Settings\mderbois-ext\Mes documents\Téléchargements\NI VeriStand FPGA Interface Tools 2010+\Files\2010\user.lib

D:\Documents and Settings\mderbois-ext\Mes documents\Téléchargements\NI VeriStand FPGA Interface Tools 2010+\Files\2011

[StephenB]

So you see the error 6 dialog?

Can you try a few things:

• Try running the installer from a different location (instead of D)
• Try running LabVIEW with admin privledges

If this doesn't work, you can always manually install by copying the folders from inside here:

D:\Documents and Settings\mderbois-ext\Mes documents\Téléchargements\NI VeriStand FPGA Interface Tools 2010+\Files\2010

To here:

C:\Program Files\National Instruments\LabVIEW 2011

[MaximeD]

Thank you !

It is working when I run the installer from C.

Regards,

[MaximeD]

Hi Stephen,

Is it possible to take advantage of hybrid mode of FPGA with this tool ?

I would like to use some channels with FPGA and some with the Scan Engine (with EtherCAT and Scan Engine Custom Device).

As Scan Engine is taking 2 DMA FIFO and this tool 2 as well, I guess it is not possible...

Thanks for your time and help,

Maxime

[StephenB]

Good question. As you noticed, it is only possible for targets with 4 or more DMA FIFOs... which is only the 9075 and 9076 chassis (note, these do not support the 986x XNET modules).

[Gaurav_Singla]

Hi Stephen,

Thank you for starting the discussion.

I am trying to implement two PWM channels on FPGA whose frequency, duty and phase difference can be runtime

changed by the application running on RT. That is , the values of frequency, duty and phase difference should be passed

by the application on RT to the FPGA and accordingly PWM's should be generated.

My RT is PXI-8186 and FPGA is PXI-7831R.

I am following the tutorial on link: https://decibel.ni.com/content/docs/DOC-13815

But i am not able to do it successfully. There seems a problem in communication between RT and FPGA.

I have used "square wave generation block" which has controllable frequency, duty and phase.

I am attaching the entire project below.

Please guide.