NI VeriStand FPGA-Based I/O Interface Tools Discussion

[jaemannpark]

Hi,

I am currently working on a project using NI cRIO-9082 and NI-9215 (analog input board).

In order to use the NI-9215 in FPGA mode, we have used the NI Veristand FPGA-based I/O Interface Tools and have successfully acquired data from a sensor that is connected to the NI-9215.

However, there is a issue that we would like to clear out.

From our experience, NI Versitand requires that there is DMA_WRITE in both the FPGA bitfile (*.lbvitx) and also the corresponding FPGA configuration file (*.fpgaconfig). However, in our application, we only require to do data acquisition and do not need a DMA_WRITE FIFO. We have come around this by connecting a NI-9263 to the cRIO-9082 and connecting the DMA_WRITE FIFO to the Analog Ouput Block within the NI Veristand RIO library. However, as I have mentioned, we actually do not need this analog output board (NI-9263) and was wondering if there would be a way to get rid of this part.

We know that in scan mode, it is fairly straight forward and simple to use the NI-9215. But we also have a high-speed NI-XNET CAN module that we use in FPGA mode. So as far as we know, both the modules need to be in FPGA mode and this is the reason that we want to implement the FPGA-based Interface Tools for use of the NI-9215.

I am farily new to NI hardware and not to mention using FPGA. My question may not make sense but any help will be appreciated.

Thank you in advance.

Jaemann

[StephenB]

Hi Jaemann,

Good questions.

You can use an XNET module + other modules in scan mode just fine without doing any FPGA coding like you have done so far. See the instructions here:

https://decibel.ni.com/content/docs/DOC-15510#Using_the_Scan_Engine_and_EtherCAT_custom_device_with_...

That should save you from having to do any FPGA code as long as scan mode meets your requirements

However, to directly answer your question, you must have at least 1 packet for each FIFO... but you don't actually have to use the data or any modules. To do this in your FPGA code simply read a packet and do nothing with the data:

(you can also remove the for loop if desired)

In your FPGA config simply use this tag to note the packet is not used "<Packet/>"

[karsten281]

Hi Stephen,

I have two questions about the project template.

1. Is there a selection for creating the FPGA project for a EtherCAT 9144 connected to a PXI? If not (I could not find it), is there a workaround by using on of the available selections? The FPGA on the EtherCAT is a Xilinx Spartan-3.

2. I assume the EtherCAT has 3 DMA channels. The only thing I want to program is counting pulses on some digital inputs. Thus, I would only need one DMA channel (DMA Read) in the project. Is it possible to skip the DMA Write of the project to have the other 2 DMAs available for the Scan Engine?

Best regards,

Karsten

[Gcestari]

Hello all,

i'm trying use the NI VeriStand FPGA Interface Tools 2010+ 1.2.0 with Labview 2013.

With Labview 2012 all VI appears correctly but with 2013 not.

I got the zip file from https://decibel.ni.com/content/docs/DOC-13815 and run the Installer vi.

The NI FPGA Project template runs correctly but there´s no VI on pallet.

I'm working with a old version without compatibility with Labview 2013?

Best regars,

Cestari

[StephenB]

Hello. I have tested this on LabVIEW 2013 and it works great for me.

• What palette is missing? Can you show a screenshot?
• Are you using LV 2013 32bit?
• What language is your computer set to?
• Did you unzip the zip file before running the installer?

[Gcestari]

• What palette is missing? Can you show a screenshot?

          NI Veristand FPGA Support

• Are you using LV 2013 32bit?

          Version 13.0 - 32 bit

• What language is your computer set to?

          English

• Did you unzip the zip file before running the installer?

          Yes, i did!

One issue was fixed!

The  NI Veristand folder was not created into vi.lib folder during Labview 2013 installation.

A copy from older directory fix it!

For now the problem is, Engine Simulation Custom Device VI´s does not appear.

All other FPGA Veristand Supported related VI's appears correctly!

If i try to load the custom device from Veristand it´s load correctly!

How can i fix it?

[StephenB]

reinstall the AES library after installing this, that should fix it.

[Gcestari]

Thanks so much!

Was fixed!

Now i can see all vi from Engine Simulation Custom Device!

Best Regards!

[NFT]

This is a really nice tool for creating FPGA personalities. I have run into one small issue though.

I tried using this wizard to create a project using a few Drivven/NI Powertrain Controls modules (AD Combo, ESTTL, DI Driver, Throttle Driver, and PFI Driver) and it does add the modules to the project. However, it does not add the I/O folders to the project for each module, and the modules have an error icon on them with [Error: Type not supported] next to them. If I manually remove these modules and re-add them, they work fine.

Thanks!

Edit: Forgot to mention that I'm using LabVIEW 2013.

[DMous]

Hi,

How can I configure the analog I/O mode of a PXI-7841R board?

I have a VeriStand project with a PXI-7841R board. The PXI chassis is not connected to my developpement computer.
So, is there a way to configure the Analog I/O mode without accessing the FPGA board from a developpment computer? For exemple, is it possible to configure the analog I/O mode thanks to the *.fpgaconfig file?

VeriStand 2012

LabVIEW 2012 SP1