Engine Simulation Custom Device Feedback

[jamesy]

Hey Steven,  Well thanks for having a look. I'll raise it with you NI buddies.  thanks and have a nice weekend.  James

[jamesy]

Hi steven,  I made some changes to my custom VI, (Removed the Write DMA) rebuilt and deployed.  Keep getting this error:   any ideas what this means?  tried re-installing the custom device and rebooting everything

[StephenB]

You have to have both DMA s and at least one packet in each

[jamesy]

What do I wire the 1 write packet to if I'm not using it ?

[jamesy]

Resolved this one. The DMA does not need to be wired to anything, just set the number of packets to == 1 as you say. Include both DMAs in the fpgaconfig too even if not using one of them or veristand throws an error. Everything Works fine now.  James

[jamesy]

Hey Stephen, Thank you for your veristand FPGA support last year. I look forward to upgrading our veristand HIL benches later in the year.  I thought you might like this link to an announcement from our customer GM, it shows what we are doing: http://media.gm.com/media/us/en/gm/news.detail.html/content/Pages/news/us/en/2015/Jan/0105-gm-ventur...  You can see a quick clip of the veristand HIL in the full video on our website: ( 1 min 10 secs in) https://www.youtube.com/watch?v=YXkq6Fzuuas  thanks again, James.

[StephenB]

James,

Fantastic!

I am actually quite familiar with this case study. I had no idea it was you working on it though. Cool! Thank you for sharing your success!