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PXIe-6704 Measuring Analog Output Signal

hello

 

i have a PXIe with an analog output card 6704.

 

i am emulating a signal and have mapped it to the 6704 analog output. i have connected an SCB-68A breakout box this card and and am trying to view the signal on an oscilloscope.

 

the emulated signal is running at around 35kHz and the signal is a sinewave at around 400Hz.

 

i have connected the oscilloscope to terminal 22 and the gnd to terminal 55 on the SCB-68A but and not seeing the wave.

 

i am wondering if the card is suitable for presenting an emulated signal such as this in the for of a 0..10V analog signal?

 

thanks

Brendan

 

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First the stupid things I have seen:

1. Does your code use Voltage Output 8?  That is the signal you are probing.

2. What impedience are you using for your oscilloscope?  Make sure it is set to the 1MOhm.  The 50 Ohm will kill the signal from the DAQ.


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Hello,

 

thanks for the reply,

 

1. i am using a 500MHz probe 10:1 10Mohm//9.5pF for 1Mohm//10.25pF

 

2. on the inside of the SCB68A box it saw AO 0 is at terminal 22?

i have mapped the signal from the model to AO8 on veristand and have measured at terminal 22 and 55 just now. i am seeing a signal but it is definitly binary not the analog wave. the signal i am seeing is a continious sequence of square waves?

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here is the waveform i am seeing on the veristand workspace. where as the oscilliscope is showing me something like this

http://zone.ni.com/images/reference/en-XX/help/372458D-01/pseudorandom_binary.gif

 

the model i am running on the pxie has been compiled with a discrete time step and is running at this time step on the pxie hence it is "steppy"

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i have been working on this during the moring and have created a simpler model that just has a chirp function. so it increasesz the frequency over a period of time. i see that the lower frequencies are displaying on the oscilliscope as sinusiodal (however the negative cycle seems to be clipped off) as the freq increases the signal becomes more steppy or squarewave like and eventually becomes a square wave.

 

would the output card of the PXIe be limiting the signal in some way? i would have expected to see the same shape as i see in the workspace?

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@bennyk wrote:

as the freq increases the signal becomes more steppy or squarewave like and eventually becomes a square wave.


That is a function of your output sample rate.  If you can get your loop to run faster, it will look less "steppy".


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i created a single sine wave model this time and have the clipping problem sorted. the sinewave is set at a freq of 15Hz on the model but i am seeing approx 6Hz on the workspace graph and 5 Hz on the physical oscilloscope. i have the PCL running at 10kHz in this case.

 

i was running my desired wave at 35kHz and the PCL was 35kHz but i am seeing the square wave i described earlier? even though the workspace graph is displaying the wave as in the picture.

 

i am trying to represent the simulated waveform exactly at the SCB68A output terminals as an analog signal. do you think this is possible? can you tell me is the card just outputting points or a continuous signal?

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@bennyk wrote:

i was running my desired wave at 35kHz and the PCL was 35kHz but i am seeing the square wave i described earlier? even though the workspace graph is displaying the wave as in the picture.


Interesting that your output frequency if being cut in half.  Not sure what is up with that.  But you really need to read up on sampling theory.  If you are trying to output 35kHz with a sample rate of 35kHz, I would expect to see a DC signal.

 

Let's try explaining it slightly differently.  Let's just say you have a sample rate of 1kHz.  So each sample is 1ms apart.  Now let's say you are trying to output a 500Hz signal.  So the period of the signal is 2ms.  So in a given period of your signal, you will have 2 samples (2ms period/1ms sample rate).  This will look like a square wave.  So if you increase your sample rate to 10kHz, that results in a sample rate of 0.1ms.  So your 500Hz signal would be represented by 20 samples.  This will likely look like the stair step you are seeing.  The more samples per signal period, the smoother it will look.

 

Now, considering your PXI-6704 is a static analog output, your sample rate is dependent on how quickly you can write samples to the DAQmx Write.  On a Windows PC, I would not expect much faster than 1kHz.  Even then, it will not be a consistant sample rate (software timing is horribly inaccurate).  You may want to look into something like the PXIe-6738, which can output waveforms at up to 1M Samples/second.


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the model i am using was compiled into a DLL with a Ts of 2.8571e-5 sec (35kHz). the model is now ran in real time on the PXIe with the PCL set to 35kHz. i was under the impression that the best way to optimise a model to run in the PXIe was to compile the model at a fixed step time and then making the PCL of the PXIe run the model at the same frequency at which it was compiled i.e. 35kHz.

 

in this case the PXIe would calculate the output of the model every 2.8571e-5 sec and then write the result to the output of the analog output card. the resulting sinewave from the model would not be at 35kHz in it frequency rather the number of data points that make up the sinewave would be 2.8571e-5 sec apart.

 

i am using a simple enough model and used the configuration benchmarking tool to find the max freq and it gave me approx 35kHz hence this is the value i am using. as it stands the model runs at 35kHz and the waveform is sinusoidal in the VeriStand workspace (provided that i increase the update rate in the setup tab). this indicates to me that the PXIe is calculating the points correctly however it is not writing them to the 6704 fast enough?

 

yes if i ran the model on a PC i guess 1kHz is the fastest, in fact i have done this in VeriStand. However in my case i am actually running the model on the target system embedded controller

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If you are running at 35KHz, Nyquist states that the fastest signal you can actually output is half of that, which is 17.5kHz.  You actually can only output a signal less than 17.5kHz.  If you want anything remotely clean, I would say your output frequency should be no faster than 3kHz.


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