Sync PXIe-6570 to external clock

[EnthusiasticStudent]

I am interested in bursting a pattern, with the PXIe-6570, that is synchronized to an external clock.

Currently, I can input the CLK on one of the channels and I would like to detect the CLK change and then send the signal.

Below is an example pattern:

As far as I understand I should be able to compare the CLK input with high (pin state H) and low (pin state L), and then determine the success or failure of this with a jump_if opcode. If the state of the clk was high and then low the two jump_if opcodes should simply continue and then the command should be sent, but that does not seem to be the case.

I have tried to reverse the condition to jump_if(failed, SYNC), but the pattern then times out.

I have tried to capture the CLK with the PXIe-6570 and it is very well defined.

I read that any comparison has to have a minimum of 80 vectors between execution and evaluation so I have tried variations around 80 repeats before the jump_if opcode.

None of these work.

[NIRebecca]

Hi EnthusiasticStudent,

Have you seen Digital Pattern Instrument: Source Synchronous Acquisition.

It documents aligning the Digital Pattern Instrument with an external clock with a similar theory but using matching rather than failing.

Let us know how you're getting on and if you have any other questions!
Rebecca