05-27-2020 02:51 PM
I am curious to know what ADC and DAC devices are in use in the PXIe-5820, or at least if they are JESD204 based devices, or at least what latency there is between the analog input/outputs and the corresponding sample data in the FPGA fabric in both RX and TX directions. Can anybody help with this?
05-27-2020 03:27 PM
I assume this is not in any of the documentation of the 5820.
Do you need to know the lowest possible loopback latency AI to AO? (I do not know it but clarifying in case someone else has this info)