cRIO analog output 9263 maximum frequency

[demo66]

Hi!

I created a timed loop to write data from the fpga memory to two DO's and four AO's. My problem is that the maximum frequency to time the loop is about 50KHz. If I use only one AO it is no problem to reach 100KHz.

In the specification in written that the AO's can reach 100 ks/s. Does anybody knows why I can't reach this limit?

regards,

demo66

[Xaqmx]

Demo-

Which FPGA hardware are you using (R-series or cRIO) and what does your output loop look like? I'm guessing that you are writing output serially inside each loop iteration instead of in parallel and showing down your loop. Would it be possible to post your VI or a quick screenshot so we have a better idea of how you are writing your outputs.

It sounds like you are probably using a 9263 or 9264 for your AO, both of which have simultaneous AO capabilities. If this is the case, its most likely your code slowing down the party and not the hardware.

I'll know more when I can see your VI.

Xaq "Bulldozer"

[JMota]

Make sure you have all the AO channels in the same IO Node and that you are not executing logic within the AO loop that may add substantial overhead and/or that is sequential to the AO node.

[demo66]

Hi!

I'm using a cRIO with a 9263 output. Attached you can find a screenshot from my VI. My problem is when I use a timed loop I get the error that memory readings are not allowed.

Thank you for your help.

demo

Message Edited by demo66 on 10-11-2007 09:45 AM

[demo66]

Hi!

I solved my problem.

I created a seperate loop to write my outputs with a conrtol and inserted local variables in my main loop.

demo66

[nrtdn]

Hi demo66,

Can you provide here your VI or screenshot of the program in which you are testing the max freq of NI9263?
Because I have some problems to obtain the write freq of NI9263 as 100kS/sec as mentioned in datasheet.