06-20-2016 05:33 PM
HI Muffin,
Thanks for your reply.
1. If I move the data fetch in the red circular, it will report the same error as I posted before. To be honest, I think the out loop data fetch will be matter.
2. I tried the USRP_Rx_continous_8_channel.vi. For this VI, with clock and and PPS from octcolck. I can run this VI in 5M IQ sampling rate.
3. I feel like with network port configurawtion and corresponsing driver, it may never achieve 8 synchronized channel on 40 MHz IQ sampling rate.
I notice that Labview seems like provided different blocks (or drover) for USRP and USRP RIO. WIthout accessing to the FPGA, high IQ rate cannot be achieved.
Cheers,
Bo
06-21-2016 09:15 AM
True_Boombo,
How are you connecting to the USRP RIO? Through Ethernet or through a PCIe connection?
And what happens when you increase the IQ sampling rate on the example? Does it give you an error?
06-21-2016 09:52 AM
Hi Muffin,
I am connecting 4 USRP 2943Rs with 2 Network card, each card has 2 ports.
If I increase the IQ sampling rate, it simple report overflow error (the solutions are: reduce sampling rate, increase number of samples per fectch.....).
Cheers,
Bo