08-24-2006 01:28 PM
Alan,
Thanks a ton ; the 3rd post VI is working . As you can see this is a steep learning curve for me. I have more questions popping up
1)
I understand from your message that M series has 2 ctrs so what if I want to extend the above application and create more train of pulses say one which has a different intial delay and more/less number of pulses. Can't I reuse the counters along with different input triggers.
2) How is the digital output different from counter output . Could you please explain this with an example say the working of a constant write digital channel burst . Can we use it for generating pulses .
3) From what I know the counter is nothing but a time keeping device however it is labelled as a physical port too . I am not sure how to relate these causally .Also it seems strange that even when I am just using a single port the other one is busy too (looks like a waste!!). Also I am curious about the significance of source of ticks during pulse generation . Is the concept of this in any way related to counters..
4) When we say counter 1 internal O/P does it mean that there are 2 o/p 's possible one for internal use the other as an external port (I just want to confirm this idea)
Thanks for your patience
Ams
08-25-2006 01:59 PM
09-01-2006 03:44 PM
Dear Alan,
The links you sent have provided useful information however there is not much information explaning the difference in circuitry of a Digital I/O and a counter
1) I have attached a VI in which we have a digital IO however as can be seen there is no control for initial delay , duty cycle etc..Is there a way to have that kind of flexibilty may be by inserting a simulate signal somewhere 🙂 . I guess the clocks would only give a sample rate.
Besides the above the attached VI on running gives an error of property "start trigger is not supported" (Why?) . I hope top make this work (with your help) and then insert a retriggable in it.
2) You had explained that for a finite retriggable pulse both counters are used , I assume that would be tru only if I am using a counter output and will not be true if I am using a digital output.
3) Is it true that counter ckt has an inbuilt clock (well I did need one when I modified your pause trigger VI to use ticks) and that a digital IO must have a clock.
4) I was trying to generate a continuous pulse using ticks option (in order to understand how ticks work) but for some reason it does not allow me to put a value of greater than 1 in the low ticks option and gives me an error for any value of less than 2 ticks so I can't any way to run it for ticks . It seems to work fine for time and frequency option. (I have attached this VI too)
Thanks
Aman
09-01-2006 03:45 PM
Alan,
The first point attachment is in this message.
09-07-2006 10:36 AM
09-11-2006 07:55 PM
Alan,
1) What is the difference between a timing source and a clock. I know the difference that clock speeds can be made cause I reconfigured your VI to work with ticks.
09-12-2006 10:41 AM
09-21-2006 11:14 PM
Alan,
I need a clarification. Based on our previous interaction I understand that Digital I/O lines can create a pulse train however we cannot ask for a duty cycle , retrigger on a digital I/O . The same can be achieved only by using counter ckt (for some hardware reason which I don’t know but would like to) as your previous example showed.
In a previous message you have also mentioned that one must use a timed digital output to create a finite pulse train .I would like to confirm that counter and a timed digital O/P are the same thing.
Aman
09-25-2006 11:03 AM
09-25-2006 01:50 PM
Jesse,
Jesse,
Thanks for the reference on counters
I understand that a timing source of some sort is needed to generate a pulse train; that could be a counter or in case of a digital O/P or Analog O/P a clock.
1) I observed that in a DAQmx Timing (used in waveform buffer generator for example) there is just a sample clock ; there is no indication of clock source however when I try to use ticks option in the create channel to create pulses (using counters) I am needed to specify the clock source..is this because that in the former case the DAQmx timing automatically picks up the clock source (or is sample clock in itself an independent variable clock) and the user needs to be concerned with only determining the clock rate ??
2) Can you please elucidate the relation between clock source; clock sample rate; samples per buffer and cycles per buffer ; what is the signifigance of each and how they relate to the final frequency of the pulse train. ( I believe that clock source sets the sample rate i.e how fast the high’s and low’s are created ; is there a buffer fill rate too I mean could there be a conflict on how fast a buffer is filled up and how fast it is read out etc..)
Aman