Hardware Trigger Output Pulse Train on Ctr2:7 PCI-6602

[MrYoung]

Hi,

I can generate a pulse train on ctr0 and ctr1 individually or simultaneously starting upon a digital edge on PFI0. See the snapshot of the block digram below.

As you can see, I trigger the task by writing to line0 which is connected to PFI0. As stated previously, this works as expected for both ctr0 and ctr1, however, I cannot get it to work for ANY other counter on the board! I need the task to start upon a trigger because I want multiple pulse trains to start EXACTLY at the same time. If you just start a multichannel task in software, each pulse train is slightly offset from the others.

This is identical to the problem Travis was having in this post http://forums.ni.com/t5/Counter-Timer/LabVIEW-DAQmx-Synchronized-Continuous-Pulse-Generation-On-Four.... Of course this wasn't really answered. It was simply stated that it should work, and there doesn't seem to be any reason for the problem.

I have tried triggering off PFI1 and PFI2 thinking that it may have something to do with counter routing proximity, but it didn't change anything.

I need to have 3 pulse trains starting upon the same trigger, and I can only get 2 (ctr0 and ctr1).

Hardware: PCI 6602 and CB-68

Sofware: LV2009SP1, DAQmx 8.9.5

Please help!

Andrew

[MrYoung]

OK, I think I may have answered my own question (why after an entire day of debugging do I find a solution minutes after posting)

I would still appreciate an AE to confirm this theory but I believe the issue is related to the other counters sharing pins with the DIO Port. 

If you check out the pinout, you find that ONLY CTR0 and CTR1 do not share pins with port0! Counters 2 through 7 all share pins with the DIO. THUS, trying to trigger these counters to output by writing to port0 causes some unforeseen chaos. Why an error isn't reported by DAQmx, I don't know, as surely there is a resource conflict happening, but surely this is the only reason.

Now, to get around this, you simply need to trigger your counters from somewhere else right!? To do this, just check out this link: http://decibel.ni.com/content/docs/DOC-6263

PLEASE NOTE!!!! TO BE ABLE TO SELECT "Ctr0InternalOutput" as a line YOU NEED TO right click on the constant/terminal >> IO name Filtering... and select "Include Advanced Terminals"

I sincerely hope an AE gets back to us to confirm my theory, and that I've saved some more people the headache I experienced today.

Andrew

[EEsRULEtheWORLD]

Hi MrYoung,

You are correct.  NI-660x devices share digital lines with the counters; therefore, if a counter is being used, those digital lines can only be used in the same direction as the counter line.  By setting up the digital trigger to be PFI0 (which is also P0.0), you are attempting to configure this line as a digital input.  If you attempt to use a counter that shares the same port (P0.0 = port 0, line 0) to generate a pulse train, you will not be able to do so, because the counter line and digital lines are not configured to be used in the same direction.  Note: The counters that use port 0 are counters 2 through 7 for the PCI-6602.

This KnowledgeBase may be helpful in determining if your device is capable of individually configuring digital lines for input and output on the same port.

[MrYoung]

Hi Sara,

Thank you for confirming my suspicions. Your timely response is greatly appreciated.

Andrew

[Brad_K · Accepted solution]

Hi Andrew,

Actually, I think this issue was reported as CAR #149610, "Committing a digital task (DI or DO) on any line on Port 0 on 660X stops pulse train generation on counters 2-7", which was fixed in NI-DAQmx 9.0. I tried out your code with a PXI-6602 and the latest version of NI-DAQmx. I'm not sure exactly what symptoms you were seeing, but with the newer DAQmx version, the VI did not produce any errors and the counter received a trigger from the DIO line.

By the way, it's also worth noting that in your code, the counter starts listening for a trigger on PFI0 before the DIO task has configured PFI0 as an output. This happens to work because PFI0 has a weak pull-down resistor, so it is low when tristated. If this was a different device type and trigger edge, or if PFI0 was connected to external circuitry, triggering on a tristated terminal could result in triggering early (i.e. before DAQmx Write is called).

Brad

[MrYoung]

Hi Brad,

Thanks for clarifying the issue. I'm glad there was a CAR generated for this issue. I'm actually surprised that such an obvious weakness in DAQmx wasn't found earlier. Most people probably only use counter0 and 1 so they don't see the issue. I'm currently running 8.9.5 so I will install the latest version and give it a whirl! I'd prefer to use PFI0 than the internal output from another counter as this gives resource conflicts when trying to set up a Finite sample task if you use the wrong combination of counters.

Thanks again,

Andrew

(Ex-AE for NI Australia)

[MrYoung]

Hi Brad,

I'm sorry but the pain continues.

I've installed DAQmx 9.0.2 (because that's the latest one I have on DVD), and gave it a spin. It indeed did work with counter2 however I could not get it to work in using Finite Samples running more than one counter channel. It DOES work when running it in Continuous mode.

WWWHHHHHHHHYYYYYYYYYYYYYYYYYYYYYYYYYYY!!!!!!!!!!!???????????????????

I've been working on getting this SIMPLE multiple pulse train generation for over a week now, and I'm starting to lose whatever faith I used to have in DAQmx as being easy to use.

[John_P1]

Hi MrYoung,

A finite counter output task uses two counters on the 6602--are you getting "resource reserved" errors?

What's the exact behavior/error message you are seeing and what does your code look like?

Best Regards,