PCI 6602 counter card: time lag between roll over and reset to zero?

[wbilll]

Hi,

I was using PCI6602 to perform some photon counting task. As the 32-bit counter will roll over, it is able to count up to 2^32/80M = 53.68 seconds (when 80MHz timebase is used) before roll over. My question is, is there any preset time lag between the terminal count and the first count of the next round after roll over? Or it is still 12.5 ns? As shown in the attached pic where I measured the photon arrival time for 5~10 mins, it will be good if the lag after the 53.6870 could be known accurately. Any help will be appreciated!

[Kevin_Price · Accepted solution]

There is no lag.  The 32-bit count register increments directly from all bits set (0xFFFFFFFF) to no bits set (0x00000000) on consecutive timebase edges.

This reminds me of one of the reasons I tend to favor doing U32 reads in units of Ticks from counters.  The magic of two's complement integers is that when you subtract 0x00000000 - xFFFFFFFF, the result coming back is 1.

When you read 1D DBL's in units of seconds, you'll have to carefully do the math yourself.

Either way, there's no lag.  The internal count register happily rolls over and keeps going.  Note that there's a DAQmx Channel property you can query for "Terminal Count Reached?".  It will latch True on any rollover, but self-reset back to False once you've queried it when True.

-Kevin P

[wbilll]

Hi Kevin,

Thank you so much for the explanation. That's very helpful.