PXIe-4081 jitter (start sampling clocks synchronously)

[PeterDavis]

I have a pair of PXIe-4081 in a chassis. I am using them for synchronous measurements, so I have the same sample rate and trigger source (from PXI_TRIG0 from a PXIe_5413).

I want to remove any phase angle/measurement delay separation between the two channels. So I inject the same voltage waveform into both DMMs/4081s.  I take lots of sample data and then FFT the sample data. From the FFT of the sample data, I extract the phase angle and for each waveform I inject I average over ~20 seconds. I subtract the phase angle from 1 DMM from the another and compare the standard deviation of the phase angle.

The standard deviation of the phase angle measurement is very low - less than 0.1 µRad for each sinewave injected. However, when I stop sampling and start sampling for the next waveform it becomes a different phase angle, but once again with a very low standard deviation. For all measurements, the phase angle difference bounces between two values. When injecting  2 kHz the phase angle difference was either 0.005604 or -0.00138 rad. At 8 kHz it was either -0.0055 or 0.022416. They do scale equally with frequency so at 20 kHz they are 10 times the size of the 2 kHz values.

 At 2 kHz, 1 cycle takes 0.005 seconds, which gives the duration of 1 radian to be about 80 µs. I am seeing a variation of ~0.007 radians between the difference between the two phase angles equates to about 0.6 µs which is close to the 1.8 MSa/s sampling rate I am using. Are the two sampling clocks not perfectly aligned? is there a way to make sure they align? The only parts of the NIDMM which look valid are the trigger slope, mine is currently set to 0 (rising edge) or the Auto Delay part of the trigger Delay, mine is currently set to -1 (Auto Delay on)

All the jitter trigger values for the chassis PXIe-1082 are in the picosecond scale so the jitter between channels cannot be explained by this (unless I have poorly implemented it)

[santo_13]

Unfortunately, 4081 are DMM and not meant to be treated like DAQ to maintain phase in capture but rather prioritize the accuracy. You can only control the trigger to measure and not the actual phase or reference clock of the ADCs inside the DMM. I believe, none of the high-resolution DMMs in the market couldn't do what you specified, just because DMMs don't consider the phase or actual time it captures the signal to be very much strict in us or ns.

[PeterDavis]

Thanks for the response Santo_13.

I hadn't considered the device to be different than the my pxi5992, just in two slots instead of 1 and with isolated inputs. So I guess I am treating it as a DAQ, once sampling the phase angle is rock solid and I would just to like to cancel this a bit better.

I think my assumption had been that each of the 4081 would have their clocks associated with the pxie_100clk at the same point. I have been a bit perplexed how they down sample the 100Mhz to the 1.8Msa, maybe would have been easier at 2Msa?

Maybe some of the new Fl*ke 8.5 digit DMM offer both external clock and triggers, but maybe it would be the same problems as the 4081s.

[santo_13 · Accepted solution]

Yeah, just that DMMs are designed to provide you with very accurate measurements with long aperture/integration times. The digitizer feature is just an add-on with derated specifications and the circuits are not designed to be an excellent DAQ at heart.

That is exactly the reason why you don't see any of the DMMs provide a phase specification for digitizer mode whereas the DAQ or DSA cards provide one (like PXIe4464).

[Henrik_Volkers]

If you need to use the 4081s and can use the same range for both channels to measure ratio and phase,

there is one 'trick' to cancel the phase (and amplitude) differences between both channels:

'just' swap the channels during the measurement (could be something as simple as a 2P2T Relay)

now you have two ratio measurements (R_1 + R_2)

R_1 = (DUT_1 * S_dmm1)/(DUT_2 * S_dmm2)   and

R_2 = (DUT_1 * S_dmm2)/(DUT_2 * S_dmm1)

(with DUT_x as your complex input source x  and S_dmm as the complex transfer function of your 8041 (including the delay 😉

now calc the complex geometric mean  (R_mean=SQRT(R1*R2) (has two solutions, just choose the rigth one 😉 ) 

gain and phase differences of both channels cancel out , leaving the (dynamic) nonlinearity error 🙂

[PeterDavis]

Thanks Henrik, I have implemented channel swapping before to eliminate the phase problem, so will probably have to build a device as you have suggested. The ability to hard wire sampling clocks between the DMMS could have made my life easier