Process for configuring and deploying FPGA code alongside DCAF engine

[KeenanJohnson]

I have to write some FPGA code to interface with some hardware and I'm a bit unsure on the reccomended steps to deploy that alongside my DCAF application.

In the FPGA build spec, do I need to select the "Run When Loaded to FPGA?"?

Should I select the "load bitfile" option in the DCAF RIO configuration?

What's the best deployment setup for moving my bitfile to the FPGA?

[MattP]

Depends on the behavior you're looking for.

If you want to have a fixed personality that will not get updated, and you want it to start running as soon as possible after power-on (to control IO, for example), then pushing the bitfile to flash on the target, set to run when loaded, is the best bet. 

To get access to the bitfile within a module, the framework provides a functional global to store and retrieve any FPGA references you need.  Check out the Host Main.vi generated with the DCAF Basic Execution Template.  In there you'll find a diagram disabled call to the functional global.  Load it up with whatever bitfiles you need, keyed by the RIO device name (RIO0, RIO1, etc).

If you want to load a bitfile by path at runtime, that's what the Open Dynamic Bitfile Reference function is for.  You'll need to add the bitfile to your system at whatever path the code expects.

I'm checking to see if the configuration options for the target are currently linked to back end code to do those steps for you already.  This was on our feature backlog from the first release, and I'm not sure if the version on tools network has this in there or not yet.

The target configuration for a cRIO target handles this in the background for you.  Check out <LabVIEW>\vi.lib\NI\DCAF\Tag Editor Core\Framework Configuration Classes\target cRIO runtime\initialize.vi - this is where the magic happens.  It calls the Open Dynamic Bitfile Reference function with the options you specified in the configuration editor.  The config editor options will also add the bitfile to the list of files to push to the target using the DCAF deployment tool.

Note also that if you have FPGA code that you want to interface to DCAF via the front panel, we have a module to be posted very soon that will do that in a generic fashion.  Let me know if that is needed and I'll point you to where that will be located.

Message was edited by: MattP

[MattP]

If you are statically calling a specific VI or bitfile via the Open FPGA VI Reference call, you don't actually need to move the bitfile to the target.  The bitfile gets inlined into the VI that calls Open FPGA VI Reference and gets moved over to the target automatically.

[KeenanJohnson]

Thanks for the response.

I didn't realize that the bitfile gets inlined in the VI in that scenario.

Thanks!