GLA Summit - For all LabVIEW and TestStand Enthusiasts!
I wish there was a presentation on...
We've had a couple people ask if there was a submission yet on 'x' topic, not because they want to give one, but because they'd like to see one. Is anyone else in that boat? If so, go ahead and make a comment below indicating content you'd like to see (but don't want to present on).
You're also welcome to make a completely new thread on this board if you'd prefer!
I'd like (and was about to post a new thread, but Chris beat me too it) a presentation on common patterns (ideally in the style of "Design Patterns: Elements of Reusable Object-Oriented Software (GoF)) in FPGA code.
Something not too dissimilar to (but perhaps a little extended in comparison to) this presentation would be good: LabVIEW FPGA Design Patterns and Best Practices (NIWeek 2014?)
I'd like to know about common mistakes and the better way of writing FPGA-based code.
@McQuillan wrote:
@cbutcher wrote:
I'd like (and was about to post a new thread, but Chris beat me too it) a presentation on common patterns (ideally in the style of "Design Patterns: Elements of Reusable Object-Oriented Software (GoF)) in FPGA code.
Sam Taggart and I were talking about submitting a presentation about GoF. I'll send him a message and get something submitted 🙂
That's great (and even if it doesn't match what I mean, it's probably still great) but I just want to reiterate I'm specifically looking for FPGA guidance, which probably eliminates many of the patterns that are actually in the GoF book (anything relying on dynamic dispatch, for example, would be very difficult/impossible maybe?)
There are a few examples (in e.g. the NI presentation linked above) for handshaking and state machines, and I expect there are many clever ways to use these that I haven't imagined.
Also, even if you can't unbundle I/O references, you can still use classes to handle some of the timing, mediation and interactions/relationships between different lines, signals and conditions.
It's hard (for me) to say exactly what I'm looking for, because if I knew it, I probably wouldn't be looking, but I expect there are many stupid things I'm doing that have better solutions...
Maybe more advanced uses of handshaking between loops, to handle e.g. sequencing of signals or settings updates, rather than directly pipelining numerical processing? Just guessing, really...
@Terry_ALE wrote:
I am interested in this but first some comments and questions.
As mentioned above, software optimizations and techniques are mostly single core minded where on an FPGA things are spatial and so forth.
Has a new thread for this been made?
There is now - I wish... FPGA Best Practices. I'll copy the rest of your reply and some further comments over to that thread to avoid making this a long discussion about a single hypothetical presentation!
I'm passionate about software engineering infrastructure and continuous integration. So I'd love to hear about anything developed in our community on
- Automating build processes
- Running tests before code submission
- Running tests after build
- Generating Auto documentation
- Automating interactions with SCC
- Automating interactions with Virtual Machines / Docker
- Package Design
