Looks like the transition edge of your trigger signal (the clock) happens more quickly than one sample clock of the digitizer. If the transition is occurring right around sample 8 on your plot, and there is a little bit of jitter on that clock, it will sometimes be recognized at sample 8 and sometimes on sample 9. The shift you see on the graph is just a one-sample jitter in which sample "catches" the trigger edge transition.
This is natural since the horizontal resolution is limited by the sample rate of the digitizer. However, the trigger circuit itself has sub-sample resolution for analog edge detection. This information will be apparent in the timestamps returned in the waveform info struct from a Fetch or Read call.
The timestamps tell you the time between the analog edge trigger and the first sample in the record. If you line up the multiple acquisitions by the trigger timestamp, rather than on the samples, the waveforms will match up.
For your application, perhaps you should increase the sample rate of the digitizer. I see that you're running ~7.5 MS/s. The 5122 can sample as fast as 100 MS/s. You may have more data than you need, but the jitter from acquisition to acquisition will be smaller.
With one sample of jitter at 7.5 MS/s, the jitter is 133 ns.
With one sample of jitter at 50 MS/s, the jitter is 20 ns.
With one sample of jitter at 100 MS/s, the jitter is 10 ns.
I realize this may be a little confusing. Please refer to the TDC and Timestamping topics in the Digitizers Online Help (Digitizers.chm).
Patrick
