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About using Clock multiplier M and CDC 7005 divisor N for 5640R DAC to achieve flexible output symbol rate, It's not working, why?

Hi folks, 

I followed the shipped FPGA example and have realized a transmitter which can send out signal at smaple rate=2MHz=symbol rate*samples/symbol. The symbol rate=80k and the samples/symbol=25. I sumarized the relation between 200MHz VCXO clock and the smaple rate as:

200M* Clock multiplier M/(CDC 7005 divisor N*4*CIC interpolation factor)=smaple rate=symbol rate*samples/symbol. (The M and N equals 1 by defalut, just following the examples.CIC interpolation factor=25. )

 

The problem is:

I want to realize  symbol rate=160k and 320k respectively, so I have to change the values of M and N.

For  symbol rate=160k, I set M=4 and N=2,and keep the other parameters unchanged.

For symbol rate=320k, I set M=4, and N=1. and keep the other parameters unchanged.

According to the specification:

In DAC, M=1 or 4<=M<=20. And M can be configured using ni5640r DAC program VI.

N can be 1,2,4,8,16 and can be  configured using ni5640r configure timebase VI.

 

I did all those according to the specification, why i can only send out noise?It seems M and N can't be changed to values other than 1?!

 

Thanks for help!

 

Sunny 

帖子被xy_se在 08-25-2008 04:53 PM
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Hi Sunny

 

Unfortunately, it isn’t as easy as just changing those two settings.  You also have to take into account the changes into setting the NCO/IF frequency of the DAC.  Also, the settings you are using are also not a possible configuration for the DAC.  I refer to the specification sheet for the AD 9857 DAC.

 

First, the two variables N and M.  Referring to page 9 of the Getting Started with the NI PCI-5640R IF Transceiver and the LabVIEW FPGA Module document, which should have been installed by the ni5640R driver.  N is used to determine the REFCLKDAC_<i> frequency, which is essentially 200 MHz divided by N.  This is the clock that will be provided to the DAC.  In your case, the frequency is now 100 MHz.  (200 MHz /2).

 

Referring to the AD 9857 DAC specification sheet, specifically page 32 on the topic of Reference Clock multiplier.  M is the Reference Clock Multiplier.  The DAC uses this value to multiply the clock coming in to a higher clock frequency.   In your case using M = to 4, that is multiplying the 100 MHz clock in up to 400 MHz. 

 

Unfortunately, at this point, the DAC limits the output of the PLL to 200 MHz.  You can only choose values of N and M that will result in a frequency at this point that is less than 200 MHz.  So, you will need to choose other values.

 

Second, now that we have changed the frequency of the clock going to the DAC, we have to change the value that is sent to the register to set the NCO frequency so that the DAC sets the NCO frequency correctly.  The good news is that this is relatively easy.  The VI named ni5640R DAC Configure for Quadrature Mode.vi has a front panel control labeled Previously Configured REFCLK Freq (Hz).  The actual value based on the value of N you select should be written to this control.  This will ensure that your NCO frequency is set correctly. 

 

I’ve modified the ni5640R Analog Input and Output to do these two things and generate the tone at the correct frequencies.

 

Jerry

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