10-28-2015 08:18 AM
I am trying Full-Streaming FPGA example. It had been running smoothly but today it's giving following error.
10-28-2015 08:44 AM
Hello Wired_.
It sounds like your GVI is referencing the TX Streaming 0 DMA FIFO. Can you check that the DMA FIFO is available in your System Explorer, make sure there aren't any naming differences.
If this does not resolve the issue, you can locate exact node that throws the error? This will help determine where the issue is occurring.
Regards,
10-28-2015 08:59 AM
Hi!
I am running the exact same code as was shipped in for Full-Duplex Streaming. The design ran smoothly a few days before though!
I dont think I changed names or FIFO as such. Tx streaming FIFO is available as seen from the System Designer.
As per the report error is coming from configure_stream.gvi.
10-28-2015 09:03 AM
Hey Wired_
If you did not change the project at all, can you try to recreate the Full-Duplex Streaming Project?
Regards,
10-28-2015 09:05 AM
You are referring to recompiling the Streaming XCVR-FPGA?
What do you exactly mean by recreating?
10-28-2015 09:17 AM
Another thing to check/confirm is the RIO interface number for your USRP is correct. You're using RIO0, which may've changed if your system has other RIO devices. Use MAX to confirm.
10-28-2015 09:19 AM
10-28-2015 09:23 AM
Hello Wired_,
Make a new Project from the Templates and try to run that.
Regards,
10-28-2015 09:26 AM
10-28-2015 09:36 AM
My first thought is the same as tcap's... something has definitely changed so that the project can't find the FIFO (named "Tx Stream 0") that configure stream is looking for. Looking at your screenshot, I can see a ' * ' character in the tab after your .lvproject and "Configure Stream.gvi" documents. This means something has changed in those files... I'd either undo it, or confirm that you only made desired changes and save.