This has been a huge frustration in my development. There is no way to debug a Flex RIO + NI1483 FPGA design other than to tweak, compile, and test with actual hardware. NI should provide a VHDL behavioral simuation of all of their modules so that full end-to-end simulation can be performed using advanced simulators such as ModelSim. This would facilitate a much more robust FPGA development cycle for their customers who have these types of tools available.
For the NI1483, a VHDL simulation combined with a VHDL Camera Link behavioral model would be even better. But the CameraLink model could be developed by the customers as it (At least) is a standard or can be gleened from camera manufacturer documentation.
