Reflect Interface Configuration in Configure FPGA VI Reference Interface

[Mathieu_R.]

Hello,

I recently have issue configuring FPGA Vis to be run seemlessy by the same host code, because of incompatible interface between VIs. Here is the Configure FPGA VI Reference Interface :

Configure FPGA VI Reference Interface

And here are two (differents) interface, fore FPGA 1.vi and FPGA 2.vi respectively, as seen in the context help. I just duplicate the VI for the example and get the tab order modified - see under Registers :

Context Help for FPVA 1.viContext Help for FPVA 2.vi

I think it could be more consistent to have the same kind of display in the configure dialog, with the same control order. It's quite confusing not seeing any difference when configuring a reference to discover that something is wrong at run-time (controls and indicators are separated, and then sorted alphabetically - I only set controls in my example code, no indicators). The context help over the dynamic reference finally helps me to figure out what was wrong but it tokk me a while...

Please note that the FPGA FIFOs have to be define if the same order from one bitfile to an other (if there is differents targets, or differents projects). This is correctly reflected by the configuration window.

So I suggest having a more coherent display of control and indicators interfaces, that correspond to the effective interface (just like the context help does), i.e. the tab order of the controls under Registers.

Best regards,

[Terry_ALE]

I think this is an important issue.  I encounter this as well when working with more complex systems.

When the number of registers grow, do you consider the Instruction Framework?  https://www.ni.com/docs/en-US/bundle/if-digitizers/page/instr_frmwk_design_library_overview.html

[Mathieu_R.]

I posted a pure customer's application agnostic example screenshot, with a simple VI (just dropped some controls). For my current project, FPGA VI do not have so much items in registers - most of the communication is done using DMA channels. But I totally agree that it could be a mess with a little bit more registers !

I just learned that the Instruction Framework exists - thanks to you ! Is this specific to IF digitizers ? (I don't think so...). Just found this page, that may be a good starting point I guess : Instruction Framework Tutorial - NI Community

Thanks for pointing me this framework !

[Terry_ALE]

My main issue with the Instruction Framework (IFW) is that I cannot have it be part of code which simulates.  I have a number of items posted here (idea exchange) regarding IFW.