Support malleable VIs in FPGA targets

[avogadro5]

I work with malleable VIs a lot on desktop. They can save a lot of boilerplate code. From my understanding, the entire feature has no effect once code is compiled: the VI is converted to an "instance" VI with the proper data types and inlined into the caller. This doesn't seem like it should be problematic to use on an FPGA target.

Here are a few FPGA-specific wins that I think VIM support would deliver:

• Array size adaptation
  • One can imagine writing a "parallel for loop" VIM that simply expands out N parallel iterations for array sizes 0-N
• Fixed point configuration adaptation
  • Without VIM, if you write a VI that operates on fixed point numbers, it will auto-coerce to the configuration on the controls of the VI

[Terry_ALE]

I was under the impression that VIMs are supported in LabVIEW FPGA.  The FlexRIO examples for products such as 5785 have .vim files for triggering and/or circular buffer.

[Intaris]

I use malleable VIs a lot on FPGA. What doesn't work?

[avogadro5]

I don't know how I got the idea it doesn't work. I must have hallucinated. I suggest NI decline this idea.