Analog input-output FPGA

[MyrzaMBM]

Hello,

i am new with Labview, i create a simple VI with a simple analog input output

i generate a sin signal but i have not the same forme at the output. ( the result is in the picture ) 

i am using NI 5783 Adapter Module and NI PXIe -1082.

i think that is a sampling problem,, but i cant fix it.

[LocalDSP]

Welcome to LabVIEW.

    It is always better to attach a copy of your code than a simple screenshot.

    It looks like the only thing you've done is to loop back the acquired signal (AI) to your adaptor module AO and measured that output with an oscilloscope.

    Have you looked at the actual input signal with your oscilloscope? Preferably at the same time as the AO output (2-channels). How can you be sure the signal on your screenshot is not what you actually are inputting to your adaptor module?

    The signal looks like some sort of sine tone that is heavily affected by unstabilities. I wouldn't be surprised if your sine tone generator is having a stability problem, but with that little information I can't be sure.

    When you try to debug an issue, don't immediately assume that a problem is caused by a specific part of your system (in this case your RIO system). Step back and look at the entire system to try to understand all possible causes for your problem.

[MyrzaMBM]

Hello, yes i am sure that the generater Give me a clean Signal ( sin signal) . I think that the problème is in thé sampling rate.

[LocalDSP]

What is you sine tone frequency?

What is you RIO module sample rate?

Any other details regarding your setup and measurement conditions you'd like to share?

[MyrzaMBM]

i fixe the generator to give min a sin signal with 100  Khz , the RIO module sample rate is (200 MS/s -bits AO, 100MS/s 16-bits AI) 

[Kyle_G · Accepted solution]

Hi,

The 5783 has double the output sample rate from the input sample rate, so you must provide 2 samples per sample clock on the AO side. This is done using both the "AO 0 Data N Data Clock" and "AO 0 Data N-1 Data Clock" inputs. By leaving the N-1 sample unused, Labview defaults it to 0, causing every other sample on the output to jump back to 0V.

[MyrzaMBM]

it works with this sollution, thank you .

[MyrzaMBM]

Hello

your solution allowed me to visualize a sinusoidal signal on the oscilloscope, but on the graph of LabVIEW I do not see the sinusoidal singal at all.

[LocalDSP]

Guessing that you are using a Waveform Chart placed on the front panel of your FPGA VI.

The chart will update with new samples as fast as it can but it cannot come even close to follow the 100 MS/s rate of your data. That is why you see something that looks random.

To see your actual sine tone signal you need to display an array of contiguous samples on a Waveform Graph rather than a Chart. To do so you need to first stream (DMA) your data to the host and display an array (snapshot) on your host VI front panel.

There are various examples you can use to see how to DMA data to a host VI.

[MyrzaMBM]

I searched and tried some examples but it does not work.
if you can help me with an example close to my case, how to do a DMA!