Can't figure out why FPGA code won't compile, says files are missing

[GotRobotFriends]

Hey guys, I get the following error, sorry for the big vomit of error code. As near as I can tell from reading that, it thinks a number of the files it requires to run some of the subvi's I'm calling are missing. I don't understand how to fix this when these are LabView native files, for example, the high-throughput rectangular to polar converter?

Help much appreciated.

Error code follows:

Error 7 occurred at Open VI Reference in nirviOpenVIRefByNameOrPath.vi->niFpgaRemapObjsAndListIfUnderXNode.vi->niFpgaRemapObjsHandleXNodeSubErrors.vi->nirviMassageErrorList.vi->nirviParseAndMassageErrors.vi->nirviReloadErrorList.vi->nirviGenerateErrors.vi

Possible reason(s):

LabVIEW:  File not found. The file might have been moved or deleted, or the file path might be incorrectly formatted for the operating system. For example, use \ as path separators on Windows, : on Mac OS, and / on Linux. Verify that the path is correct using the command prompt or file explorer.
=========================
NI-488:  Nonexistent GPIB interface.

VI Path:
All text parsed:

<CodeGenErr>
<ErrorCode>-61160</ErrorCode>
<DynamicText><TreeLineInfo><LineInfo><DiagramObject><VIPath>C:\NIFPGA2009\clntTmp\FPGAImagi~2C_FPGATarg~A7_2Tap8bit~6A_nagEfsCz~08\MungedForFPGA\NI.Munge.2 Tap 8 bit RT Image Processing Initial.vi_FPGACompileCopy00000001.vi</VIPath>
<UID>5485</UID>
<ObjectName>High Throughput Rectangular To Polar</ObjectName>
</DiagramObject>
</LineInfo>
</TreeLineInfo>
</DynamicText>
</CodeGenErr>

<CodeGenErr>
<ErrorCode>-61101</ErrorCode>
<DynamicText><TreeLineInfo><TreeInfo><TreeID>1</TreeID>
</TreeInfo>
<LineInfo><DiagramObject><VIPath>C:\NIFPGA2009\clntTmp\FPGAImagi~2C_FPGATarg~A7_2Tap8bit~6A_nagEfsCz~08\MungedForFPGA\NI.Munge.2 Tap 8 bit RT Image Processing Initial.vi_FPGACompileCopy00000001.vi</VIPath>
<UID>5036</UID>
<ObjectName>SubVI: &apos;Butterworth Filter&apos;</ObjectName>
</DiagramObject>
</LineInfo>
</TreeLineInfo>
</DynamicText>
</CodeGenErr>

<CodeGenErr>
<ErrorCode>-61101</ErrorCode>
<DynamicText><TreeLineInfo><TreeInfo><TreeID>1</TreeID>
</TreeInfo>
<LineInfo><DiagramObject><VIPath>C:\Program Files\National Instruments\LabVIEW 2009\vi.lib\rvi\Analysis\utilities\niFPGA I32xI32 Dot Product - 3 elements I64.vi</VIPath>
<UID>63</UID>
<ObjectName>Timed Loop</ObjectName>
</DiagramObject>
</LineInfo>
</TreeLineInfo>
</DynamicText>
</CodeGenErr>

<CodeGenErr>
<ErrorCode>-61101</ErrorCode>
<DynamicText><TreeLineInfo><TreeInfo><TreeID>1</TreeID>
</TreeInfo>
<LineInfo><DiagramObject><VIPath>C:\NIFPGA2009\clntTmp\FPGAImagi~2C_FPGATarg~A7_2Tap8bit~6A_nagEfsCz~08\MungedForFPGA\NI.Munge.2 Tap 8 bit RT Image Processing Initial.vi_FPGACompileCopy00000001.vi</VIPath>
<UID>5036</UID>
<ObjectName>SubVI: &apos;Butterworth Filter&apos;</ObjectName>
</DiagramObject>
</LineInfo>
</TreeLineInfo>
</DynamicText>
</CodeGenErr>

<CodeGenErr>
<ErrorCode>-61101</ErrorCode>
<DynamicText><TreeLineInfo><TreeInfo><TreeID>1</TreeID>
</TreeInfo>
<LineInfo><DiagramObject><VIPath>C:\NIFPGA2009\clntTmp\FPGAImagi~2C_FPGATarg~A7_2Tap8bit~6A_nagEfsCz~08\MungedForFPGA\NI.Munge.2 Tap 8 bit RT Image Processing Initial.vi_FPGACompileCopy00000001.vi</VIPath>
<UID>5036</UID>
<ObjectName>SubVI: &apos;Butterworth Filter&apos;</ObjectName>
</DiagramObject>
</LineInfo>
</TreeLineInfo>
</DynamicText>
</CodeGenErr>
 

[Ben_S]

GotRobotFriends,

Hello! First of all, can I get the following information from you? 

1.) LabVIEW and LabVIEW FPGA Versions

2.) FPGA Target you are trying to compile code for.

Typically errors 61101 and 61160 are thrown when a Single Cycle Timed Loop (SCTL) has elements within it that won't allow it to finish it's execution in 1 clock cycle.

Looking through the error codes below, do you have any of the following items in a Single Cycle Timed Loop?

• High Throughput Rectangular To Polar 
• Butterworth Filter

Also, are you using xnodes? Problems have been seen when items that would normally return an error when placed in a SCTL do not return errors if they are used with xnodes.

[GotRobotFriends]

Hi Ben

Yes I have both those inside a single cycle timed loop. I was under the impression that they  introduced a latency rather than throwing an error. No I'm not using xnodes, I'll have a look through the help, could you give me a quick run down on what they do?

Regards

Alex

[Ben_S]

GotRobotFriends,

If you look at the Help or the FAQ for Single-Cycle Timed Loops (SCTLs) there are lists for the items that are not allowed in SCTLs. The Butterworth Filter is on that list, however, at first glance I don't see the High Throughput Rectangular To Polar function. Would it be possible to convert your SCTL to a while loop and see if that resolves the compilation failure?

Also, can I get the following information?

1.) LabVIEW and LabVIEW FPGA Versions

2.) FPGA Target you are trying to compile code for.

[GotRobotFriends]

Labview 2009, attempting to compile for a pxi-7951R, I'm not sure exactly which labview FPGA version I have but I think it's pretty recent. Yes I have removed the butterworth filter and the high throughput rectangular to polar, I'm now doing the rectangular to polar manually spread out over a couple of loops.

regards

Alex

[Ben_S]

GotRobotFriends,

Did removing the butterworth filter and high throughput rectangular to polar allow you to now succesfully complie your FPGA code?

[GotRobotFriends]

Hi Ben

I removed the butterworth filter, and set up the rectangular to polar correctly  and it's now compiled. Cheers

Alex