LabVIEW
Cannot use Select inside For Loop inside SCTL (FPGA) - Bug? Alternate approach?
Solved!
When I put a Select inside a For Loop inside a Single-Cycle Timed Loop in LabVIEW FPGA, I get the following error when I try to compile:
"An internal software error has occurred. Please contact National Instruments technical support at ni.com/support with the following information:
Error -61003 occurred at
Possible reason(s):
LabVIEW FPGA: You cannot include this function in a For Loop when the For Loop is inside a single-cycle Timed Loop."
I haven't seen anything documented that says this isn't allowed; is this a bug, or did I miss some documentation?
The code that causes this error looks like this, inside a SCTL (ignore the stray boolean wire behind the for loop)
I've come up with the code below instead, which does compile in a Single-Cycle Timed Loop, but it looks a bit ugly. Does anyone have a better suggestion?
Actually, the documentation for SCTLs seems to mention, rather specifically, that what you are doing should be working.
https://zone.ni.com/reference/en-XX/help/371599L-01/lvfpga/fpga_timed_loop/
I would would think bug but would want to hear what other people think.
Tried it myself and I received the same error. Interestingly enough, if you use a Case Structure instead of Select everything will work fine.
It might be easier to follow, but no where near as fun or clever as your own solution above.
