09-30-2015 09:20 AM
Hi All,
I want to acquire analog input data from a funtion generator using single cycle timed loop and DMA FIFO. I want to use the acquired data to act as process variable for my PID control. Can the code attached perform the purpose? I am sceptical about its functionality. Any advice or suggestions please.
Kind Regards,
Opuk
Solved! Go to Solution.
09-30-2015 10:42 AM
Anything outside of the SCTL won't update while the SCTL runs. You'll pass the same value each time.
09-30-2015 07:33 PM
The SCTL is not doing anything for you here. Just remove it and write directly from your analog read to the DMA Write.
And on the Host side, you should move the Run method to before the loop.
You should also consider doing the PID inside of the FPGA. PIDs work the best in a deterministic environment, and you can't get any more deterministic than on an FPGA.
10-01-2015 07:29 AM - edited 10-01-2015 07:32 AM
Thanks alot natasftw for the response
10-01-2015 07:32 AM
Thanks crossrulz for the prompt response. I removed the SCTL from the fpga and removed the Run method out of the loop as suggested and it works. Thanks