01-31-2016 07:08 AM
Hi guys, I am getting an error in DAQ when I perform debugging on the code. I am using 4330 and 6361 modules. I have attempted to synchronize the data by sharing the reference PXI clock and share a start trigger. The acquisition is finite. Any suggestions would be appreciated.
01-31-2016 09:26 AM
01-31-2016 10:37 AM
Mike - Thanks for the immediate reply.
I am trying to synchronise the signals from the two modules using the phase loop circuit (PLL) of the PXI_CKL10 reference clock. This will cause the time base of all boards to be synchronised. I changed the vi as shown below. The error is because the hardware does not support the route of NI PXIe 4330. Is there any way to route the signals thought the module if this is the problem?
01-31-2016 02:04 PM
For the syncrhonisation, the modules support the following
4330 -- Onboard 100 MHz clock, Backplane PXIe_CLK100 ---- Internal frequency 100 MHz with accuracy of +- 50 ppm
6361 -- Reference clock locking frequency for Phase-Locked Loop (PLL) PXIe_CLK100
In the manual it states that external wiring is needed..Is it possible anyone to advise me on how to do this please?
02-01-2016 06:15 AM
Anyone?
02-01-2016 07:27 AM
Check this link out ;
http://digital.ni.com/public.nsf/allkb/B3A73388A3968E0F86257156007F7E3E
BR,
Vincent
02-01-2016 07:29 AM
Already done that..so the one module will need to be routed throught the PXI trigger??
02-01-2016 07:32 AM
Did you read that link ?
http://digital.ni.com/public.nsf/websearch/E539D226A643C1CE8625715E007C23C8?OpenDocument
It should show you which rout is available for your hardware. Up to you to choose the right one.
BR,
Vincent
02-03-2016 04:49 AM
Thanks,
I will reverse the tasks; master the task where the trigger is connected to as I had them in the opposite direction.