FPGA FFT windowing

[IhmeKyselijä]

Hi,

I am creating a program in LabVIEW FPGA that takes data in at 3.2 GSamples/s and processes it as 16 channels with a 200 MHz clock (3.2/16=0.2). So I have 16 samples coming in each iteration of the single cycle timed loop and I am doing an FFT on them (FFT express vi in singe channels, multiple samples mode, blocklength 1024). I need to do some windowing on my signal and I was going to use the Scaled Window vi that the LabVIEW FPGA provides but that only takes in one sample per tick. How can I efficiently do 16 samples at a time?

Here is a screenshot of the code:

The signal is aguired to the left of the diagram an sent out on the right (The bottom part is from the getting started example on FlexRIO Integrated IO). I tried (mostly for fun) to calculate a scaled window for each channel separately but I do not think that is going to compile and also it would make the result not very smooth as all values are scaled separately (each vector element is multiplied with the same coefficient). That attempt is shown on the above picture. What should I do?

Inside the subVI that I tried:

the scaled window is set at Hanning, length 64 (64*16=1024)

Aarni

[UMASO · Accepted solution]

Unfortunately, LabVIEW FPGA does not provide windowing function for multiple samples per cycle.  Placing the existing windowing function in parallel is not the right way to achieve it.  

You may have to impelment your own windowing function supporting 16 samples per cycle.  If you have some experiences, it is not so hard to implement such function block by yourself.  

That could be something like a waveform generator which repeatedly generates same waveform from a storage configured by block RAMs.  The waveform repeatedly generated from block RAMs should be the windowing function.  Windowing function should be provided as multiple samples per clock cycle same as the number of your input signals (16 samples in this case).  First, you download windowing function from host PC to memory space on FPGA.  After the data downloaded to FPGA, start generating windowing function repeatedly from the memory.  The timing you retrieve every section of 16 samples from memory should be the same timing of your input signal.  

If you are new to LabVIEW FPGA, I would recommend to learn through LV FPGA training materials.  

[UMASO]

Hello, I apologize that it was wrong I said LabVIEW FPGA does not provide function block for windowing multiple samples per cycle on FPGA.   LabVIEW FPGA actually provides a reference for generating multiple samples per clock from block RAM, and you can apply this reference to windowing multiple samples per clock on FPGA.  The reference is provided in an example program.  

You first go to "NI Example Finder" >> "Hardware Input and Output" >> "FlexRIO" >> "Integrated IO" >> "Getting Started" >> "Getting Started FlexRIO Integrated IO.vi"

On the VI above, select PXIe-5745 for generating an example code.  After that, please take a look at the FPGA code below.  It supports all the functions I described in my previous post.