FPGA Project Error Message: Write Method in an Unsupported Clock Domain

[Elizabeth_Rose]

I am new to LabVIEW FPGA, and having a lot of trouble with it. Ignoring "ultimate goals" for now, I am currently focusing on just getting some kind of signal to output from my NI PXIe-7972 FPGA + NI PXIe-5783 adapter module. Any signal. If it outputted a wave in the shape of a middle finger on my oscilloscope, I'd be overjoyed because at least it would be something.

I have attached a screenshot showing all of my windows (project, block diagram, interface, and error window). I used a built-in example from the path /program files/National Instruments/LabVIEW 2015/examples/R Series/Basic IO/Analog Output. I created a new FPGA target for the PXIe-7672, added the 200 MHz clock needed to eliminate the red exclamation mark next to the IO Module in the Project, and transferred the example VI to the new target. (I have also tried this by making a completely new project and copying a clean copy of the VI into it). In the block diagram, I changed the example connectors to be (what I believe are) the outputs on my PXIe-5783 adapter module.

Everything seems fine from my limited-knowledge view. But when I try to compile / run the VI for the first time, I get the same error, seen in the top left corner of the screenshot, of the form "The <method> <IOType> for <IOResource> is used in a clock domain that does not support it. The supported clock domain is <RequiredClockDomain>".

I can't for the life of me figure out what this means or how to fix it. The project goals that I'm trying to accomplish are a LOT more complicated than this, so it's getting to be really disheartening. Can someone please help me with this?

Thank you.

[nathand]

Try writing to the specific Analog Output channel, rather than the associated Data Clock. This is just a guess, as I don't seem to have the driver for that particular module installed so I can't directly test it.

[Elizabeth_Rose]

Yep..I..definitely thought that's what I was already doing... That was the only option that had the "AO" label that's written on the front of my adapter module.

I've attached a list of all of the I/O options available when I right click on the output modules in the block diagram.

[nathand]

I'm sorry, I should have investigated that specific module more thoroughly before posting, since apparently it's a bit more complicated than many of the other NI products (with a tradeoff that you get more control over the exact sample timing).

My best guess, after skimming part of the manual, is that you need to set a up a timed loop, with the clock source set to match the AO Data Clock.

Also, this thread says there's an example for that specific module, have you been able to load it?

[Elizabeth_Rose]

@nathand wrote:

apparently it's a bit more complicated than many of the other NI products

Ah hah.. haha.... of course that would be my luck... *Sob*

But seriously, don't apologize. I'm the one trying to do stuff far beyond my knowledge base here.

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@nathand wrote:

My best guess, after skimming part of the manual, is that you need to set a up a timed loop, with the clock source set to match the AO Data Clock.

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That's what I was doing, I think. I set the clock, mostly for sure. I got the loop to compile if I changed the output to "DIO Port 1 Wr Data", but nothing came out of it. So I think it's definitely at least partially releated to my incorrect choice of output ports...but I can't figure out the output ports. I used this link: http://zone.ni.com/reference/en-XX/help/372614J-01/friotransamr/5783_clip/ to look at the meanings of those choices, but none of them seem to actually be the analog output I'm expecting, since they're mostly booleans. Like, eventually the idea is to output a sine wave, so I don't think boolean outputs would help me in the slightest...

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@nathand wrote:

Also, this thread says there's an example for that specific module, have you been able to load it?

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I got it to compile, but it doesn't appear to do anything...I've got my oscilloscope hooked up to AO0, and it doesn't show any kind of signal no matter what I do. I don't get it. =/

[nathand · Accepted solution]

I found an spare machine and some time, and installed the driver for the 5783, so now I can see the example ("NI 5783 Getting Started"). As I mentioned before, you need to create a timed loop, with the clock source matching the Data Clock (in the example, the data clock is the source for the timed loop).

When you run the example, are you running the Host VI (found in the same project)? Without running the host, I wouldn't expect you'll see anything. By running the host VI (and not the FPGA - the host will launch that for you), you should be able to generate a high-frequency sine wave on one of the analog output channels.

[Elizabeth_Rose]

@nathand wrote:

I found an spare machine and some time, and installed the driver for the 5783

I seriously can't thank you enough - that was very kind of you to do!

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@nathand wrote:

When you run the example, are you running the Host VI (found in the same project)? Without running the host, I wouldn't expect you'll see anything. By running the host VI (and not the FPGA - the host will launch that for you), you should be able to generate a high-frequency sine wave on one of the analog output channels.

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I now feel extremely silly...I'm kind of learning LabVIEW FPGA by trial-and-error (the bossman didn't want to pay for training) and I didn't realize you had to run the host VI AND the FPGA VI. I just did so and the example works BEAUTIFULLY. So I can build off of this now to get it to do what I want (phase locking it to an external 10 MHz trigger, among other things..which I don't know how to do yet, but at least I've finally gotten somewhere!)

Thank you thank you thank you!!!

[David-A]

A good resource for folks writing LabVIEW FPGA code inside of a single cycle timed loop (SCTL) is the LabVIEW High-Performance FPGA Developer's Guide.

http://www.ni.com/tutorial/14600/en/

Also, if you've got a labview license you're entitled to free self paced online training, which includes LabVIEW FPGA.

http://www.ni.com/white-paper/14457/en/