I need to design a Labview FPGA VI that implements a 100-channel 256-coefficient Single-rate FIR filter with 50 coefficients sets (that is, each set is shared among 2 channels). The coefficients sets must be reloadable and do not need to be initialized.
Since I successfully did it in the past, I have devised to resort on the Digital Filter Design Toolkit (Start IP Generator -> Single-Rate Filter ->More Options->Coefficients->Multiple Coefficient Sets), but it seems that I have to bind manually each coefficient set to each pair of channels. That's dramatically slow and extremely prone to errors.
Is there any way to do the job in a fast, more reliable and (hopefully) programmatic manner by relying on the DFD toolkit? If not, which strategy should I pursue?
