FPGA Square Wave Generator hijacks loop timing

[JOmega]

Problem Description :

I have a simple while loop with a case structure inside. In one case I have the
FPGA Sinewave generator sending output data to AO0, in the other case I have
the FPGA Square Wave generator sending output to AO0. Both Sine and Square
waves are set to run at 10 kHz

I also have a shift register that changes the state of DIO0 every loop thru.
That way I can look at DIO0 on my scope and tell how fast the loop is running.

When I choose the SineWave generator, the output on AO0 is what I  expect. That
is I have a sine wave at 10kHz and the loop speed is about 1 us. All is good.

Then I switch to the Square wave. I get a 10 kHz square wave which is good. But
my loop speed has been way slowed down to 50 us (it tracks the square wave
exactly) That is: one time through the loop sets the square wave to  FS and the
next time through the loop it sets the square wave to -FS.

My problem is that when I generate a square wave I would expect the loop speed
to stay fast as it does for the sine wave. You can see that if my loop speed
slows to 50 us (for a 10 kHz square wave) then all my calculations that should
go in parallel with the square wave will be exceedingly slowed down also.

Please help me with my understanding of the use of the FPGA Square Wave sub-VI

Thanks
Rich

NI Software :  LabVIEW FPGA Module  version 2013 SP1
NI Hardware :  R Series device USB-7855R

[crossrulz · Accepted solution]

If you dig into the express VI, it loops a SSTL until there is a change in value.  The sine wave doesn't need to do that since the value will change constantly.

If you can, I would recommend making your While loop a SSTL and configure the express VIs accordingly.  This will work as long as the rest of your code in the loop can execute in a single clock cycle.

[JOmega]

Crossrulz

Thank you, that helped me understand how the square wave VI works.

Rich