FPGA VI timed out while asserting EnableIn

[vitamin water]

I'm trying to run an FPGA target VI that has compiled correctly.  When it attempts to run in Interactive Execution, the following error message appears with no associated error code.

An internal software error in the LabVIEW FPGA module has occurred.
Additional Information:  The FPGA VI timed out while asserting EnableIn.

I'm running LabVIEW 2010 SP1 with FPGA SP1, the target is a RIO PCI-7833R. 

Attached is the VI I'm trying to run.  Most of the subsections are disabled because I'm only working on a small portion of the code with has to do with syncing a camera with a moving stage.

Thanks,

Noah

[christian_w]

Don't forget that the FPGA is hardware. Defacto there's no possibility to implement a front panel in a Xilinx bitfile. If you you want to implement interactive control you have to use the host ( RT or WIN ).

br

Christian

[srm@viewpointusa.com]

---

@christian_w wrote:

Don't forget that the FPGA is hardware. Defacto there's no possibility to implement a front panel in a Xilinx bitfile. If you you want to implement interactive control you have to use the host ( RT or WIN ).

br

Christian

---

not sure what you mean here.  running the FPGA VI interactively like this is common practice without writing any other code.

[srm@viewpointusa.com]

I don't see anything obviously wrong but we have had strange things happen somethimes with disabled structures like you have in your case.  save the vi as another name and delete disabled items as a test.

---

@vitamin water wrote:

I'm trying to run an FPGA target VI that has compiled correctly.  When it attempts to run in Interactive Execution, the following error message appears with no associated error code.

An internal software error in the LabVIEW FPGA module has occurred.
Additional Information:  The FPGA VI timed out while asserting EnableIn.

I'm running LabVIEW 2010 SP1 with FPGA SP1, the target is a RIO PCI-7833R. 

Attached is the VI I'm trying to run.  Most of the subsections are disabled because I'm only working on a small portion of the code with has to do with syncing a camera with a moving stage.

Thanks,

Noah

---

[n_brummer]

I did as you suggested and deleted all disabled structures in a separate vi, making sure that all referenced local variables were left intact.  I'm still getting the exact same error message as before; it compiles fine but will not run in interactive execution. 

---

@stu@viewpointusa.com wrote:

I don't see anything obviously wrong but we have had strange things happen somethimes with disabled structures like you have in your case.  save the vi as another name and delete disabled items as a test.

---

@vitamin water wrote:

I'm trying to run an FPGA target VI that has compiled correctly.  When it attempts to run in Interactive Execution, the following error message appears with no associated error code.

An internal software error in the LabVIEW FPGA module has occurred.
Additional Information:  The FPGA VI timed out while asserting EnableIn.

I'm running LabVIEW 2010 SP1 with FPGA SP1, the target is a RIO PCI-7833R. 

Attached is the VI I'm trying to run.  Most of the subsections are disabled because I'm only working on a small portion of the code with has to do with syncing a camera with a moving stage.

Thanks,

Noah

---

---