06-12-2015 10:27 AM
Hi, I'm developing a DSP application.
I'm acquiring 3 currents and 3 voltage signal by a 9104 chassis equipped with a 9220 module. The chassis itself does the first part of signal elaboration. .The total time comsumption for acquisition and elaboration I’ve measured takes about 500 ticks (12,5us).
After the elaboration I obtain three signals that I send by means of ethercat protocol to the second chassis (slave chassis, 9144) for the last part of the DSP where 3 outputs are sent with a 9401. This operation, takes something like 6000 ticks (150us). Is it correct to do so with an ethercat system, or is better to setup the communication with direct FPGAtoFPGA? For example using only couples of digital input/output modules. Why if I fix scan engine period to 170us it doesn't work (an error message is displayed saying that scan period is too low) and with longer period (until 300us) it goes time out?
I've also another question. When I use ethercat communication have I to send signal with DMA to the controller 9022 and than, with a User-define variable, to send it to the slave? Or there is another solution?
I'm new to FPGA programming but i've just follow "Getting Started With LabVIEW FPGA" and read "Ni-Labview High Performance Fpga Developer's Guide". With basic tutorial for Ethercat communication, but i didn't find any answer for my doubt.
Anybody can help me please?
06-23-2015 04:58 AM
Hi Salinger86
I left a reply to your question in the italian forum:
09-06-2015 09:57 AM
Hi
I have 9 EtherCat slave chassis which work fine including running the FPGA in the 9th chassis
When I try to use one of the other FPGAs by making a new User-defined Variable "Test", for that FPGA, deploy it and sets the system in Active mode, I get an error -2147138553:
Error -2147138553 occurred at an unidentified location
Possible reason(s):
The variable does not exist because the master, slave, or module handle is invalid. Check the name of master, slave, or module.
It happens as soon as I have set up the first User-Defined Variable and deployed it. When I set the target and EtherCat in Active mode the error occurs, see enclosed picture “NI Distr prior to refresh modules”.
After pressing the Refresh Modules button in the NI DSM, my User-Defined Variable "Test" is vanished….., see enclosed screen dump pictures and project.
I haven't found anything on Internet regarding this error. HELP!
Best Regards Erlend Øxseth, Norway
04-15-2016 10:34 PM
I have the same error, let me know if you found why.
Thank you
Patrick
04-07-2017 09:59 AM
Hi Paubine.
Sorry for the slight delay. You and others have already found a solution
For the "Error -2147138553 " and lost User-Defined Variables, I found a solution back in 2015 (10th of September) which I e-mailed NI support:
"I found the standard firmware file (NI-9144_rev2_6.foe) for the 9144 and uploaded that to all the slave chassis using the WriteFOE.vi. After that I redeployed my User-defined variables to the two affected slave chassis. The two slave chassis then kept the variables, would accept Active mode and both the FPGAs ran the code well."
Erlend