FPGA synchronization problem after some Reading particular number of Do Pulse in Ni SBRIO 9606

[FUZZICC]

hi my self Fuzzic Developing my First FPGA LabVIEW software on NI SBRIO 9096 I have nearly completed my program but I'm having delay while reading the pulse after some particular amount of Reading it will be big help if you help me figure out my problem

[GerdW]

Hi Fuzzic,

---

@FUZZICC wrote:

hi my self Fuzzic Developing my First FPGA LabVIEW software on NI SBRIO 9096 I have nearly completed my program but I'm having delay while reading the pulse after some particular amount of Reading it will be big help if you help me figure out my problem

---

FPGA VI:

• misses a lot of wires to loop stop conditions…
• why do you need so many loops to handle DO pins? Can't you output all those boolean values in one loop?

Host VI:

• lots of Rube-Goldberg code, like this:
  
• why do you need TIMED while loops just to read shared variables??? An ordinary loop would be ok…
• why do you use local variables when their control terminal is unused?

We also miss the lvproj file…

[GerdW]

Hi Fuzzic,

suggestion to improve the subVI:

IMHO much more readable.

There is still room for improvement, like you should never compare floats for equality!