FPGA to RT communication

[Emmanuel Doit]

Hi All,

I'm having an interesting problem with my FPGA to RT communication.

I'm running an FPGA program triggering from a 5V square wave signal. I have a sequential loop in a while loop which finds the period between the rising edges of the signal, and also a counter which increments on each rising edge, within this while loop. Hence both pieces of information update at the same time, at the same point in the sequential loop, from the same rising edge. The data is sent to the RT using indicators.

In the RT I have a timed loop running at 1kHz, with an RT FIFO recording the data from the FPGA to memory. Outside of this there is a while loop reading from the RT FIFO, writing the data to disk.

I have noticed that often a new value of the tooth counter will be stored with the previous value of the tooth period, or vica versa. With the set-up I have, surely the two channels of data logged to file on a time basis should be synchronised!?

Has anyone seen this happen before, or does anyone know a fix?

Would the DMA function of LabVIEW 8 help with this problem, as I am currently using LabVIEW 7.1?

Thanks a lot,

Emmanuel

[hannahW]

Hey Emmanuel

Could you post your code? It's generally easier to see what you are describing with the actual VI, also I can then run or edit it as needed.

What hardware are you using in this setup?

If you post the code, I'll have a look at this for you.

Regards

Hannah
NIUK & Ireland

[Emmanuel Doit]

Hello Hannah,

Here is my FPGA and my RT code. These are simplified versions of my full program, but show the problem.

The most relevant bit is the first while loop in the FPGA, with the two indicators, tooth count and tooth period.

The hardware used is a NI PXI-1042 chassis, with NI PXI-8186 for the RT, and NI PXI-7833R FPGA card.

I should also explain that the square wave received is a crank signal from an engine.

Thanks a lot for any help you can give,

Emmanuel

[rolfk]

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@Emmanuel Doit wrote:

Hello Hannah,

Here is my FPGA and my RT code. These are simplified versions of my full program, but show the problem.

The most relevant bit is the first while loop in the FPGA, with the two indicators, tooth count and tooth period.

The hardware used is a NI PXI-1042 chassis, with NI PXI-8186 for the RT, and NI PXI-7833R FPGA card.

I should also explain that the square wave received is a crank signal from an engine.

Thanks a lot for any help you can give,

Emmanuel

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Even though these updates are in the same sequence frame this does not mean they are updated exactly at the same time. But this is a small problem in comparison to the reading of the values in the RT system. These values are read over some sort of serial line interface so they will always be read in sequence. The only way to ensure that you will read both related values would be to combine the two values into a cluster. LabVIEW will generate protection around the write and read access to this control so that it can guarantee that you will never read a value at the moment the control is updated.

Rolf Kalbermatter

[Emmanuel Doit]

Thank you Rolf,

Using the Cluster function in this way has solved the problem!

Best Regards,

Emmanuel