06-07-2023 03:09 AM
Who will use the NI PCE7821 R data acquisition board, my need is to read from the host host program, read the data to the FPGA use.
06-07-2023 08:07 AM
What's your exact question?
If you want some guidance to get started, refer to the shipping examples at Help >> Find Examples... >> Hardware Input and Output >> R Series
06-07-2023 08:02 PM
1.The real question is how does the FPGA accurately receive and use the hundreds of thousands of data sent from the upper computer?
2.I use the FIFO transmission of the upper computer, the next computer also uses the FIFO reception, how to ensure the integrity of the data?
06-09-2023 04:22 AM
ZYOng
God help me look
:Will data loss occur when the fpga receives data from the host in this way?
06-09-2023 01:16 PM
See How DMA Transfers Work (FPGA Module)
Your code looks good. As long as you are configuring the correct buffer size and using the correct write rate so that fifo overflow or underflow does not occur, there will be no data loss.
You can use the Timeout? output to monitor if fifo overflow or underflow happens.
06-09-2023 08:20 PM
Thank you, God
I'm sorry to trouble you again,When I run the fpga, I get a timeout,Can you help me to see how to configure my PC/host program.Such as buttfer and rate.
06-13-2023 04:11 AM
Brother help me look
Why is this possible in my simulation and not in reality?
The video is a simulation and real.
I want the effect to be simulated
06-14-2023 10:32 PM
Memory DRAM , I use PCIe 7821R hardware.
Can this memory read data at intervals?
I actually tested it, and the interval read was unstable.
Is it because Memory can't read at intervals?
06-15-2023 01:54 AM
Hi jamse,
@jamse wrote:
Memory DRAM , I use PCIe 7821R hardware.
Can this memory read data at intervals?
I actually tested it, and the interval read was unstable.
Is it because Memory can't read at intervals?
Which "intervals" are you talking about?
Keep in mind:
06-15-2023 02:05 AM
Thank you for your kind reminder
I mean that my Memory DRAM reads the data from the first address to the last address one by one, and now I want to read the data from address 1, read the data from address 4 next time, and read the data from address 7 next time, each time with an interval of 3.
I read them sequentially and the output data was normal.
If I read it at intervals, the output gets messy.