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Flexrio API communcation between host and FPGA

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Hey,

 

I have a PXIe-5774 FlexRIO digitizer and I found the getting started example project on example finder (Hardware input and output -> FlexRIO -> Integrated IO -> Getting Started). I was under the impression that the Basic.vi under My computer ran the DefaultPersonality_5774_FPGA.vi bitfile on the fpga and streamed the data coming from it to the Basic.vi front panel.

After a long time of looking at block diagrams I changed the DefaulPersonality_5774_FPGA.vi a little bit to compute an FFT to the data coming from the other channel. I compiled the VI and saw no difference in the behavior of my host VI. I started a new project with the same example without copiling any fpga VI to bitfile and was surprised to see that it ran without a single bitfile on my project folder. How can it use the FPGA without having a bitfile? How does this communication between the host pc and the fpga work? Am I supposed to create a new host vi to receive signal from the DefaulPersonality_5774_FPGA.vi bitfile that is running on my FPGA or can I make the Basic.vi run my new bitfile somehow? I am very new to labview and especially the FPGA stuff. Any help or guidance of how this is supposed to work is greatly appreciated. Also if you have any example projects (that aquire data on fpga, processes it and then sends it to the host) I would like to look at them.

 

Thanks:

Aarni

1.PNG

 

I have attached the project in a zip file and also separately the two VI:s I am talking about.

 

2.PNG

I have a PXIe-1092 chassis with two PXIe-5774s and a PXI-5402. I am running labview 2019 with all the reguired modules.

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Solution
Accepted by IhmeKyselijä

The example always loads the default bitfile. Use Open FPGA VI Reference Function to load a custom bitfile instead.

ZYOng_0-1685112810281.png

 

 

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Control Lead | Intelline Inc
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Thank you! I missed that text completely. I find it hard to understand what the blockdiagram does with just the comments. If someone knows of some better documentation of how all the FlexRIO API subVIs work it would be very appreciated, because the LabVIEW help doesn't give instructions on how to use them, just short descriptions of what they do.

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The FlexRIO API is the wrapper library of LVFPGA function nodes. The block diagram of the API is pretty much self-descriptive most of the time, provided that you are familiar with LVFPGA. I would recommend getting yourself familiarized with LVFPGA.

LabVIEW FPGA Getting Started

Everything You Need to Know About LabVIEW FPGA

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Control Lead | Intelline Inc
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