How can I implement a single cycle modulo-n function in LVFPGA?

[apchar_]

How can I implement a single cycle modulo-n function in LVFPGA? The quotient-remainder function does not support single-cycle loops. Right now the only option I have is to use left shift to effectively limit the number of bits giving me a modulo-(2^m) function but I need more control than that.

[nathand]

If there were an efficient algorithm for this, NI would have already implemented it and you'd be able to put the Quotient/Remainder function in a single-cycle timed loop 😉

Do you need only the quotient and not the remainder? What is the range and data type of the inputs? With a limited range of inputs, there might be an approach using a lookup table that would work for you.