How can I tell whether I have used all of the available DMAs?

[Muri777]

Hi all. Running a cRIO 9039 and using a handful of FPGA to RT FIFOs. From what I understand, these are all DMA's and the 9039 has a maximum 16 available. Even though I have added more than 16 FIFOs for communicaiton between the RT and FPGA, I cant find anywhere in the LabVIEW project that says whether I have used them all or whether there is an issue. Is this somewhere in the project, or are developers meant to know this beforehand and make sure not to exceed this? I had expected an error to pop up.

Thanks.

[JÞB]

The tongue in cheek answer is.

Yup! You are expected to.know no to exceed the FPGA limitations OR suffer the compilation error.

So let me defend LabVIEW just a little.  The LabVIEW Compiler runs all the time.  That is what gives you those broken run arrows on your VIs

But FPGA goes through VDML which requires a separate compilation step. Just like every text based code language. 

LabVIEW is doing the best it can to adapt to how ANY markup language works.  It's compiler is just a generation better than any text or markup language you need to force through it.

[Intaris]

Also, there's a difference between having DMA channels defined in your project and actually using them in your code.

There's even a difference between having them in your LabVIEW code and them being in your Bitfile due to dead code elimination and constant substitution. Just having the constant in your code won't neccessarily keep that channel in your bitfile.

There's no way past the Xilinx tools to find out, unfortunately.