LFSR (Linear Feedback Shift Register)

[jhannah]

I have been able to replicate Verilog code in LabVIEW and have successfully implemented both a 10-bit divider and a 14-bit divider.  Now I need to go the other direction and I am lost as to how to approach the problem.  So, said another way, I can compute N for any divide factor within the valid range.  Now, given N, I want to compute the divide factor.  Anyone out there have any ideas?

james.hannah@wiquest.com

[Nick R]

Hi James,

Do you already have VHDL code that does this for you? If you do, and you are coding this with the FPGA Module, then you could use an HDL node to interface your existing VHDL code within your LabVIEW application. As for actually implementing this using LabVIEW code, I'm afraid I don't have many ideas there.

[jhannah]

Nick,

I do not have VHDL code that does this for me, and I am not using the FPGA module.
I am simply trying to calculate the inverse of an LFSR.

Thanks,
James

[Chris_Brown]

I am currently trying to design an LFSR in the NI LabVIEW 7.0 student edition but I am coming up against a few problems. First I designed four D type flip flops and converted them to SubVI’s Connecting one output to the input of the next I found that looping the 4^th output into the input of the 1^st LabVIEW 7.0 student edition displays a black dashed error line. If anyone could come up with any solutions that’s would be great thanks – Chris Brown (bro_69@hotmail.com)

[GerdW]

Hi Chris,

put your D-FFs into a while loop and use a shift register to feedback the output of the 4th back to 1st FF! (Or a feedback node, which is merely the same.)
This is dataflow programming...


Message Edited by GerdW on 11-30-2007 02:27 PM