LabVIEW carrer with LabVIEW FPGA

[ZYOng]

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@XM43 wrote:

One thing that I have not tested but want to try is to create some logic using LabVIEW (Quicker) and then create its IP and later add that IP into a VIVADO project for ease of use. If it works out, that will be something cool to have in place. I am not sure if someone has already tried it or not.

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We use LabVIEW FPGA IP Export Utility and import the netlist into Vivado to program a Cmod A7. It is pretty cool and fun.

[XM43]

Expected it. You can have them but you will likely get unexpected results /jitter when you are creating a high performance code. This was more like a lesson learned.

You are correct, it should be: Avoid having coercion dots. (but simply do not have them in there)

I do not consider having coercion dot(s) a good practice in a code, in general.

[XM43]

That is good to know! Thank you. I am willing to give this a try!

[XM43]

ZYong,

I tried this and it indeed is a cool thing. Since I am not well versed in VHDL, it was really handy for me.

I also tried the other way around, imported VHDL to LabVIEW and that made testing/ simulating my VHDL design 1000 times easier.