Lock-in Amplifier

[johnsold]

Dimitris,

I do not know what specific limitations may exist. However, physical PLLs can be very sensitive to many parameters. Signal to noise ratio, rate of change of frequency, filter type and bandwidth, and others. Software PLLs also have sampling rate, calculation errors, loop time, ...

Can you post a VI or data file with some typical data and an explanation of what you expect it should do with the data? Also please post the latest (or best performing) version of your VI.

Lynn

[Mitss]

Lynn,

Please find attached two files.

The 'test.txt' contains the acquired data provided by my DDS function generator: first channel is sinusoidal output and second is the square synch out.

The 'BetaLI.vi'  I am using for acquisition and for LI.

If in "BetaLI.vi" you select "false"in the case structure and then you go in the "5"th option of the sequence you will find where I try to implement the lock in amplifier algorithm. To distinguish it from the rest I put it in a separate sequenece and wrote "Lock-in amplifier".

Now, when I run this VI I get the signals provided in the "test.lvm" but when I feed these signals to the lock in algorithm the PLL. It gives the usual output (fr=1E-6, phase 0). Interestingly enough the Y,X,R,Theta of the lock in demodulator are changing (probably in the correct way but I am not absolutely sure).

If you have any idea on what the problem is please let me know.

Dimitris

[johnsold]

Dimitris,

I am looking into this. It may take some time, but I will get back to you in the next few days.

Lynn

[johnsold]

Dimitris,

I have not found a solution but have identified some things to consider.

From reading the context help for LockInPLL.vi the Param input needs to have a value which results in the signal being symmetric about zero. I calculate the mean and use that for the value of param.

Init should be true the first time the VI runs.

Lock error -3 happens under some conditions.  This is an order overflow error.  It should not be occurring with the data you have, so I suspect that this is a symptom of some other problem.

Changing the Function input to Sine for the sinusoidal data does not seem to make any difference.

The Updated indicator never goes True.

The Filter TC (s) out always stays zero. 

I generated a sine wave with one of the signal generation VIs and it worked fine.

This suggested that I look at the data. Waveform Graph shows that the data is transposed when it should not be. Moving the Transpose Array to the appropriate place makes the PLL start working.

Now I can start looking at the rest of the program.  Here is my test VI.

Lynn

[Mitss]

Lynn,

Thank you very much for your time. Could you please convert the file you send me in LV2010 because I cannot open it.

[johnsold]

Sorry. I must have attached the wrong version.

Lynn

[Mitss]

Thank you very much Lynn. It seems that now it is working fine!