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Memory leak in Real-Time caused by VISA Read and Timed Loop data nodes? Doesn't make sense.

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Working with LV 8.2.1 real-time to develop a host of applications that monitor or emulate computers on RS-422 busses.   The following screen shots were taken from an application that monitors a 200Hz transmission.  After a few hours, the PXI station would crash with an awesome array of angry messages...most implying something about a loss of memory.  After much hair pulling and passing of the buck, my associate was able to discover while watching the available memory on the controller that memory loss was occurring with every loop containing a VISA read and error propogation using the data nodes (see Memory Leak.jpg).  He found that if he switched the error propogation to regular old-fashioned shift registers, then the available memory was rock-solid.  (a la No Memory Leak.jpg)

 

Any ideas what could be causing this?  Do you see any problems with the way we code these sorts of loops?  We are always attempting to optimize the way we use memory on our time-critical applications and VISA reads and DAQmx Reads give us the most heartache as we are never able to preallocate memory for these VIs.  Any tips?

 

Dan Marlow

GDLS

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Accepted by topic author thisisnotadream

Hi thisisnotadream,

 

This problem has been reported, and you seem to be exactly reproducing the conditions required to see this problem. This was reported to R&D (# 134314) for further investigation. There are multiple possible workarounds, one of which is the one that you have already found of wiring the error directly into the loop. Other situations that result in no memory leak are:

 

1.  If the bytes at port property node is not there and a read just happens in every iteration and resulting timeouts are ignored.

2.  If the case structure is gone and just blindly check the bytes at port and read every iteration.

3.  If the Timed Loop is turned into a While loop.

 

Thanks for the feedback!

 

Regards,

Stephen S.
National Instruments
Applications Engineering
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