Missing Values From FPGA to RT while Continuous Reading

[logikart9944!]

Hi,

I am Useing a C-RIO 9064 i am trying to read a angle from 2 encoders(1800 pulse and 3600 pulse)useing FPGA 

I did my FPGA and RT code

I need to read a position of 3600 pulse encoder at every pulse of 1800 pulse encoder, so i need a result of array with size 1800 

Now i am reading a Pulses in FPGA it Showing 1800 pulse/rev but when i try to make a Condition in RT to get position at every pulse me getting 1800 pulses in RT side i am missing lot of pulses 

I not use any wait inside my loop even thought i am missing pulse from FPGA to RT why????

some one know answer help me .....

please....

[psystein]

logikart9944 

,

what method are you using to transfer data from the fpga to the RT?

have you compiled the FPGA code.? how much resources have you used on the FPGA?

To get any help on your problem, you would need to elaborate on the data transfer methods used.

[crossrulz]

Without the code, it is really hard to help you.  But my guess is that you are just reading from an indicator on the FPGA on the RT side.  This is basically the same as using a local variable and introduces race conditions (you only get the latest value and you likely miss some).  Instead, you should use a DMA FIFO to send your data from the FPGA to the RT.

[logikart9944!]

Hi Everyone,

         I am Not Useing DMA Method Bcoz when i use that i am Missing more pulse from my encoder so i am going with Read and write FPGA.... 

I complied and no problem on fpga side when i am rotating my encoder in 1 rpm i am getting 1800 pulses from FPGA to RT but when i go with above 300 rpm i am missing pulses i am getting oly 1500 pulses 

Do anyone know Y its Happineing ???

And i am Haveing one question ??

How to check my FPGA and RT  running at same timeing ?? any timeing problem will give problem to miss data ???

[logikart9944!]

Hi Digant Shetty,

                               I am Using 6 analog input( NI 9205 analog module)and 5 digital inputs( NI 9401 digital module) as resource i useing Read/write Fpga to tranfer data from FPGA to RT

regards,

Logeshkarthikeyn

[Jacobson-ni]

DMA FIFOs are the only form of lossless communication between RT and FPGA so losing data using read/write nodes is not surprising.  That being said, we are only able to guess at what problem you might be running into without seeing any code so anything you can give us would be extremely helpful.

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@logikart9944! wrote:

How to check my FPGA and RT  running at same timeing ?? any timeing problem will give problem to miss data ???

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You can do some tricky stuff with user defined variables to sync up your RT and FPGA code but for the most part they should be runniing independently.  You use FIFOs so you don't have to worry about the timing between them and just use read/write nodes for basic configuration.

[psystein]

I completely agree with Matt J (Jacobson). Using DMA FIFO's are ideal to prevent data loss..

Keeping in mind that your channel count is not very high, i would advise you the following,

1. Use Target Scoped FIFO's (T S FIFO) - Each Channel will write to a T S FIFO in its own while loop.

2. use Target to Host FIFO's (T H FIFO)- Have two while loops, one for the AI & other for DI. Inside Each of the loop, data from the individual T S FIFOs will be used to build an array and then be written to the T H FIFO through a for loop.

3. On the RTOS read from the two T H FIFOs using Timed Loops.

This should prevent the loss of any data.

[crossrulz]

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logikart9944! wrote:  I am Not Useing DMA Method Bcoz when i use that i am Missing more pulse from my encoder so i am going with Read and write FPGA....

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I would have to see your code from this.  Sounds like you have a coding issue.  The DMA FIFO is lossless, so you would have to be not writing to the FIFO or reading all of the data and throwing out some of it.